wm_hspi.h 6.8 KB

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  1. /**
  2. * @file wm_hspi.h
  3. *
  4. *
  5. * @brief High speed spi slave Module
  6. *
  7. * @author dave
  8. *
  9. * Copyright (c) 2015 Winner Microelectronics Co., Ltd.
  10. */
  11. #ifndef WM_HSPI_H
  12. #define WM_HSPI_H
  13. #include "wm_type_def.h"
  14. #include "wm_ram_config.h"
  15. #define HSPI_TX_MEM_MALLOC 0 /** tx mem dynamic malloc*/
  16. #define HSPI_INTERFACE_SPI 2 /** spi interface*/
  17. #define HSPI_INTERFACE_SDIO 3 /** sdio interface*/
  18. /**rx message*/
  19. #define HSPI_RX_CMD_MSG 1
  20. #define HSPI_RX_DATA_MSG 2
  21. /**spi/sdio buffer*/
  22. #define HSPI_TXBUF_NUM 2
  23. #define HSPI_TX_DESC_NUM HSPI_TXBUF_NUM
  24. #define HSPI_RXBUF_NUM 3
  25. #define HSPI_RX_DESC_NUM HSPI_RXBUF_NUM
  26. #define HSPI_TXBUF_SIZE 1500
  27. #define HSPI_RXBUF_SIZE 1500
  28. #define HSPI_TX_DESC_SIZE sizeof(struct tls_hspi_tx_desc)
  29. #define HSPI_RX_DESC_SIZE sizeof(struct tls_hspi_rx_desc)
  30. /*****************************************************************************
  31. * sdio/hspi sram partition
  32. ******************************************************************************/
  33. /* HSPI txbuf zone */
  34. #define HSPI_TXBUF_BASE_ADDR ((u32)(SLAVE_HSPI_SDIO_ADDR))
  35. #if HSPI_TX_MEM_MALLOC
  36. #define HSPI_TXBUF_TOTAL_SIZE 0
  37. #else
  38. #define HSPI_TXBUF_TOTAL_SIZE (HSPI_TXBUF_SIZE * HSPI_TXBUF_NUM)
  39. #endif
  40. /** HSPI tx desc zone */
  41. #define HSPI_TX_DESC_BASE_ADDR ((u32)(HSPI_TXBUF_BASE_ADDR + HSPI_TXBUF_TOTAL_SIZE))
  42. #define HSPI_TX_DESC_TOTAL_SIZE (HSPI_TX_DESC_SIZE * HSPI_TX_DESC_NUM) //28*3=84
  43. /** HSPI rxbuf zone */
  44. #define HSPI_RXBUF_BASE_ADDR ((u32)(HSPI_TX_DESC_BASE_ADDR + HSPI_TX_DESC_TOTAL_SIZE))
  45. #define HSPI_RXBUF_TOTAL_SIZE (HSPI_RXBUF_NUM * HSPI_RXBUF_SIZE) //4500
  46. /** HSPI rx desc zone */
  47. #define HSPI_RX_DESC_BASE_ADDR ((u32)(HSPI_RXBUF_BASE_ADDR + HSPI_RXBUF_TOTAL_SIZE))
  48. #define HSPI_RX_DESC_TOTAL_SIZE (HSPI_RX_DESC_SIZE * HSPI_RX_DESC_NUM) //36
  49. #define SDIO_CIS_SIZE (0x80)
  50. #define SDIO_CMD_RXBUF_SIZE 256
  51. #define SDIO_CIS0_ADDR (HSPI_RX_DESC_BASE_ADDR + HSPI_RX_DESC_TOTAL_SIZE) //128
  52. #define SDIO_CIS1_ADDR (SDIO_CIS0_ADDR + SDIO_CIS_SIZE) //128
  53. #define SDIO_CMD_RXBUF_ADDR (SDIO_CIS1_ADDR + SDIO_CIS_SIZE)
  54. #define CIS_FUN0_ADDR ((u32)SDIO_CIS0_ADDR)
  55. #define CIS_FUN1_ADDR ((u32)SDIO_CIS1_ADDR)
  56. #define FN0_TPL_FUNCID (CIS_FUN0_ADDR + 0x00)
  57. #define FN0_TPL_FUNCE (CIS_FUN0_ADDR + 0x04)
  58. #define FN0_TPL_FUNCE_MAXBLK (CIS_FUN0_ADDR + 0x08)
  59. #define FN0_TPL_MANFID_MID (CIS_FUN0_ADDR + 0x0C)
  60. #define FN0_TPL_END (CIS_FUN0_ADDR + 0x10)
  61. #define FN1_TPL_FUNCID (CIS_FUN1_ADDR + 0x00)
  62. #define FN1_TPL_FUNCE (CIS_FUN1_ADDR + 0x04)
  63. #define FN1_TPL_FUNCE_VER (CIS_FUN1_ADDR + 0x08)
  64. #define FN1_TPL_FUNCE_NSN (CIS_FUN1_ADDR + 0x0C)
  65. #define FN1_TPL_FUNCE_CSASIZE (CIS_FUN1_ADDR + 0x10)
  66. #define FN1_TPL_FUNCE_OCR (CIS_FUN1_ADDR + 0x14)
  67. #define FN1_TPL_FUNCE_MINPWR (CIS_FUN1_ADDR + 0x18)
  68. #define FN1_TPL_FUNCE_STANDBY (CIS_FUN1_ADDR + 0x1C)
  69. #define FN1_TPL_FUNCE_OPTBW (CIS_FUN1_ADDR + 0x20)
  70. #define FN1_TPL_FUNCE_NTIMEOUT (CIS_FUN1_ADDR + 0x24)
  71. #define FN1_TPL_FUNCE_AVGPWR (CIS_FUN1_ADDR + 0x28)
  72. #define FN1_TPL_END (CIS_FUN1_ADDR + 0x30)
  73. /** SDIO interrupt bit definition */
  74. #define SDIO_WP_INT_SRC_CMD_DOWN (1UL<<3)
  75. #define SDIO_WP_INT_SRC_CMD_UP (1UL<<2)
  76. #define SDIO_WP_INT_SRC_DATA_DOWN (1UL<<1)
  77. #define SDIO_WP_INT_SRC_DATA_UP (1UL<<0)
  78. /** Definition of send data descriptor structure */
  79. struct tls_hspi_tx_desc {
  80. volatile u32 valid_ctrl;
  81. u32 buf_info;
  82. u32 buf_addr[3];
  83. u32 next_desc_addr;
  84. #if HSPI_TX_MEM_MALLOC
  85. u32 txbuf_addr; /**< txbuf addr, pbuf and buf_addr[0] are different */
  86. #endif
  87. };
  88. /** Definition of receive data descriptor structure */
  89. struct tls_hspi_rx_desc {
  90. u32 valid_ctrl;
  91. u32 buf_addr;
  92. u32 next_desc_addr;
  93. };
  94. /** struct tls_slave_hspi */
  95. struct tls_slave_hspi {
  96. u8 ifusermode;
  97. s16 (*rx_cmd_callback)(char *buf);
  98. s16 (*rx_data_callback)(char *buf);
  99. s16 (*tx_data_callback)(char *buf);
  100. struct tls_hspi_tx_desc *curr_tx_desc; /**< Upstream data management */
  101. struct tls_hspi_rx_desc *curr_rx_desc; /**< Downlink data management */
  102. #if HSPI_TX_MEM_MALLOC
  103. u8 txdoneflag; /**< tx done falg*/
  104. #endif
  105. };
  106. /**
  107. * @defgroup Driver_APIs Driver APIs
  108. * @brief Driver APIs
  109. */
  110. /**
  111. * @addtogroup Driver_APIs
  112. * @{
  113. */
  114. /**
  115. * @defgroup HSPI_Driver_APIs HSPI Driver APIs
  116. * @brief HSPI driver APIs
  117. */
  118. /**
  119. * @addtogroup HSPI_Driver_APIs
  120. * @{
  121. */
  122. /**
  123. * @brief This function is used to initial HSPI register.
  124. *
  125. * @param[in] None
  126. *
  127. * @retval 0 success
  128. * @retval other failed
  129. *
  130. * @note When the system is initialized, the function has been called, so users can not call this function.
  131. */
  132. int tls_slave_spi_init(void);
  133. /**
  134. * @brief This function is used to enable or disable user mode.
  135. *
  136. * @param[in] ifenable TRUE or FALSE
  137. *
  138. * @return None
  139. *
  140. * @note If the user enables the user mode, RICM instruction in the system will not be used by SPI.
  141. * If the user wants to use the SPI interface as other use, need to enable the user mode.
  142. * This function must be called before the register function.
  143. */
  144. void tls_set_hspi_user_mode(u8 ifenable);
  145. /**
  146. * @brief This function is used to set high speed interface type.
  147. *
  148. * @param[in] type is the interface type. HSPI_INTERFACE_SPI or HSPI_INTERFACE_SDIO
  149. *
  150. * @return None
  151. *
  152. * @note None
  153. */
  154. void tls_set_high_speed_interface_type(int type);
  155. /**
  156. * @brief This function is used to register hspi rx command interrupt.
  157. *
  158. * @param[in] rx_cmd_callback is the hspi rx interrupt call back function.
  159. *
  160. * @return None
  161. *
  162. * @note None
  163. */
  164. void tls_hspi_rx_cmd_callback_register(s16 (*rx_cmd_callback)(char *buf));
  165. /**
  166. * @brief This function is used to register hspi rx data interrupt.
  167. *
  168. * @param[in] rx_data_callback is the hspi rx interrupt call back function.
  169. *
  170. * @return None
  171. *
  172. * @note None
  173. */
  174. void tls_hspi_rx_data_callback_register(s16 (*rx_data_callback)(char *buf));
  175. /**
  176. * @brief This function is used to register hspi tx data interrupt.
  177. *
  178. * @param[in] tx_data_callback is the hspi tx interrupt call back function.
  179. *
  180. * @return None
  181. *
  182. * @note None
  183. */
  184. void tls_hspi_tx_data_callback_register(s16 (*tx_data_callback)(char *buf));
  185. /**
  186. * @brief This function is used to transfer data.
  187. *
  188. * @param[in] txbuf is a buf for saving user data.
  189. * @param[in] len is the data length.
  190. *
  191. * @retval transfer data len success
  192. * @retval 0 failed
  193. *
  194. * @note None
  195. */
  196. int tls_hspi_tx_data(char *txbuf, int len);
  197. /**
  198. * @}
  199. */
  200. /**
  201. * @}
  202. */
  203. #endif /* WM_HSPI_H */