portmacro.h 12 KB

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  1. /*
  2. * FreeRTOS Kernel V10.4.3 LTS Patch 2
  3. * Copyright (C) 2020 Amazon.com, Inc. or its affiliates. All Rights Reserved.
  4. *
  5. * Permission is hereby granted, free of charge, to any person obtaining a copy of
  6. * this software and associated documentation files (the "Software"), to deal in
  7. * the Software without restriction, including without limitation the rights to
  8. * use, copy, modify, merge, publish, distribute, sublicense, and/or sell copies of
  9. * the Software, and to permit persons to whom the Software is furnished to do so,
  10. * subject to the following conditions:
  11. *
  12. * The above copyright notice and this permission notice shall be included in all
  13. * copies or substantial portions of the Software.
  14. *
  15. * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
  16. * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, FITNESS
  17. * FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR
  18. * COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER
  19. * IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN
  20. * CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
  21. *
  22. * https://www.FreeRTOS.org
  23. * https://github.com/FreeRTOS
  24. *
  25. * 1 tab == 4 spaces!
  26. */
  27. #ifndef PORTMACRO_H
  28. #define PORTMACRO_H
  29. #ifdef __cplusplus
  30. extern "C" {
  31. #endif
  32. /*-----------------------------------------------------------
  33. * Port specific definitions.
  34. *
  35. * The settings in this file configure FreeRTOS correctly for the
  36. * given hardware and compiler.
  37. *
  38. * These settings should not be altered.
  39. *-----------------------------------------------------------
  40. */
  41. /* Type definitions. */
  42. #define portCHAR char
  43. #define portFLOAT float
  44. #define portDOUBLE double
  45. #define portLONG long
  46. #define portSHORT short
  47. #define portSTACK_TYPE uint32_t
  48. #define portBASE_TYPE long
  49. typedef portSTACK_TYPE StackType_t;
  50. typedef long BaseType_t;
  51. typedef unsigned long UBaseType_t;
  52. #if ( configUSE_16_BIT_TICKS == 1 )
  53. typedef uint16_t TickType_t;
  54. #define portMAX_DELAY ( TickType_t ) 0xffff
  55. #else
  56. typedef uint32_t TickType_t;
  57. #define portMAX_DELAY ( TickType_t ) 0xffffffffUL
  58. /* 32-bit tick type on a 32-bit architecture, so reads of the tick count do
  59. * not need to be guarded with a critical section. */
  60. #define portTICK_TYPE_IS_ATOMIC 1
  61. #endif
  62. /*-----------------------------------------------------------*/
  63. /* MPU specific constants. */
  64. #define portUSING_MPU_WRAPPERS 1
  65. #define portPRIVILEGE_BIT ( 0x80000000UL )
  66. #define portMPU_REGION_READ_WRITE ( 0x03UL << 24UL )
  67. #define portMPU_REGION_PRIVILEGED_READ_ONLY ( 0x05UL << 24UL )
  68. #define portMPU_REGION_READ_ONLY ( 0x06UL << 24UL )
  69. #define portMPU_REGION_PRIVILEGED_READ_WRITE ( 0x01UL << 24UL )
  70. #define portMPU_REGION_PRIVILEGED_READ_WRITE_UNPRIV_READ_ONLY ( 0x02UL << 24UL )
  71. #define portMPU_REGION_CACHEABLE_BUFFERABLE ( 0x07UL << 16UL )
  72. #define portMPU_REGION_EXECUTE_NEVER ( 0x01UL << 28UL )
  73. #define portUNPRIVILEGED_FLASH_REGION ( 0UL )
  74. #define portPRIVILEGED_FLASH_REGION ( 1UL )
  75. #define portPRIVILEGED_RAM_REGION ( 2UL )
  76. #define portGENERAL_PERIPHERALS_REGION ( 3UL )
  77. #define portSTACK_REGION ( 4UL )
  78. #define portFIRST_CONFIGURABLE_REGION ( 5UL )
  79. #define portLAST_CONFIGURABLE_REGION ( 7UL )
  80. #define portNUM_CONFIGURABLE_REGIONS ( ( portLAST_CONFIGURABLE_REGION - portFIRST_CONFIGURABLE_REGION ) + 1 )
  81. #define portTOTAL_NUM_REGIONS ( portNUM_CONFIGURABLE_REGIONS + 1 ) /* Plus one to make space for the stack region. */
  82. #define portSWITCH_TO_USER_MODE() __asm volatile ( " mrs r0, control \n orr r0, #1 \n msr control, r0 " ::: "r0", "memory" )
  83. typedef struct MPU_REGION_REGISTERS
  84. {
  85. uint32_t ulRegionBaseAddress;
  86. uint32_t ulRegionAttribute;
  87. } xMPU_REGION_REGISTERS;
  88. /* Plus 1 to create space for the stack region. */
  89. typedef struct MPU_SETTINGS
  90. {
  91. xMPU_REGION_REGISTERS xRegion[ portTOTAL_NUM_REGIONS ];
  92. } xMPU_SETTINGS;
  93. /* Architecture specifics. */
  94. #define portSTACK_GROWTH ( -1 )
  95. #define portTICK_PERIOD_MS ( ( TickType_t ) 1000 / configTICK_RATE_HZ )
  96. #define portBYTE_ALIGNMENT 8
  97. #define portDONT_DISCARD __attribute__( ( used ) )
  98. /*-----------------------------------------------------------*/
  99. /* SVC numbers for various services. */
  100. #define portSVC_START_SCHEDULER 0
  101. #define portSVC_YIELD 1
  102. #define portSVC_RAISE_PRIVILEGE 2
  103. /* Scheduler utilities. */
  104. #define portYIELD() __asm volatile ( " SVC %0 \n"::"i" ( portSVC_YIELD ) : "memory" )
  105. #define portYIELD_WITHIN_API() \
  106. { \
  107. /* Set a PendSV to request a context switch. */ \
  108. portNVIC_INT_CTRL_REG = portNVIC_PENDSVSET_BIT; \
  109. \
  110. /* Barriers are normally not required but do ensure the code is completely \
  111. * within the specified behaviour for the architecture. */ \
  112. __asm volatile ( "dsb" ::: "memory" ); \
  113. __asm volatile ( "isb" ); \
  114. }
  115. #define portNVIC_INT_CTRL_REG ( *( ( volatile uint32_t * ) 0xe000ed04 ) )
  116. #define portNVIC_PENDSVSET_BIT ( 1UL << 28UL )
  117. #define portEND_SWITCHING_ISR( xSwitchRequired ) if( xSwitchRequired ) portNVIC_INT_CTRL_REG = portNVIC_PENDSVSET_BIT
  118. #define portYIELD_FROM_ISR( x ) portEND_SWITCHING_ISR( x )
  119. /*-----------------------------------------------------------*/
  120. /* Critical section management. */
  121. extern void vPortEnterCritical( void );
  122. extern void vPortExitCritical( void );
  123. #define portSET_INTERRUPT_MASK_FROM_ISR() ulPortRaiseBASEPRI()
  124. #define portCLEAR_INTERRUPT_MASK_FROM_ISR( x ) vPortSetBASEPRI( x )
  125. #define portDISABLE_INTERRUPTS() vPortRaiseBASEPRI()
  126. #define portENABLE_INTERRUPTS() vPortSetBASEPRI( 0 )
  127. #define portENTER_CRITICAL() vPortEnterCritical()
  128. #define portEXIT_CRITICAL() vPortExitCritical()
  129. /*-----------------------------------------------------------*/
  130. /* Task function macros as described on the FreeRTOS.org WEB site. These are
  131. * not necessary for to use this port. They are defined so the common demo files
  132. * (which build with all the ports) will build. */
  133. #define portTASK_FUNCTION_PROTO( vFunction, pvParameters ) void vFunction( void * pvParameters )
  134. #define portTASK_FUNCTION( vFunction, pvParameters ) void vFunction( void * pvParameters )
  135. /*-----------------------------------------------------------*/
  136. /* Architecture specific optimisations. */
  137. #ifndef configUSE_PORT_OPTIMISED_TASK_SELECTION
  138. #define configUSE_PORT_OPTIMISED_TASK_SELECTION 1
  139. #endif
  140. #if configUSE_PORT_OPTIMISED_TASK_SELECTION == 1
  141. /* Generic helper function. */
  142. __attribute__( ( always_inline ) ) static inline uint8_t ucPortCountLeadingZeros( uint32_t ulBitmap )
  143. {
  144. uint8_t ucReturn;
  145. __asm volatile ( "clz %0, %1" : "=r" ( ucReturn ) : "r" ( ulBitmap ) : "memory" );
  146. return ucReturn;
  147. }
  148. /* Check the configuration. */
  149. #if ( configMAX_PRIORITIES > 32 )
  150. #error configUSE_PORT_OPTIMISED_TASK_SELECTION can only be set to 1 when configMAX_PRIORITIES is less than or equal to 32. It is very rare that a system requires more than 10 to 15 difference priorities as tasks that share a priority will time slice.
  151. #endif
  152. /* Store/clear the ready priorities in a bit map. */
  153. #define portRECORD_READY_PRIORITY( uxPriority, uxReadyPriorities ) ( uxReadyPriorities ) |= ( 1UL << ( uxPriority ) )
  154. #define portRESET_READY_PRIORITY( uxPriority, uxReadyPriorities ) ( uxReadyPriorities ) &= ~( 1UL << ( uxPriority ) )
  155. /*-----------------------------------------------------------*/
  156. #define portGET_HIGHEST_PRIORITY( uxTopPriority, uxReadyPriorities ) uxTopPriority = ( 31UL - ( uint32_t ) ucPortCountLeadingZeros( ( uxReadyPriorities ) ) )
  157. #endif /* configUSE_PORT_OPTIMISED_TASK_SELECTION */
  158. /*-----------------------------------------------------------*/
  159. #ifdef configASSERT
  160. void vPortValidateInterruptPriority( void );
  161. #define portASSERT_IF_INTERRUPT_PRIORITY_INVALID() vPortValidateInterruptPriority()
  162. #endif
  163. /* portNOP() is not required by this port. */
  164. #define portNOP()
  165. #define portINLINE __inline
  166. #ifndef portFORCE_INLINE
  167. #define portFORCE_INLINE inline __attribute__( ( always_inline ) )
  168. #endif
  169. /*-----------------------------------------------------------*/
  170. extern BaseType_t xIsPrivileged( void );
  171. extern void vResetPrivilege( void );
  172. /**
  173. * @brief Checks whether or not the processor is privileged.
  174. *
  175. * @return 1 if the processor is already privileged, 0 otherwise.
  176. */
  177. #define portIS_PRIVILEGED() xIsPrivileged()
  178. /**
  179. * @brief Raise an SVC request to raise privilege.
  180. */
  181. #define portRAISE_PRIVILEGE() __asm volatile ( "svc %0 \n" ::"i" ( portSVC_RAISE_PRIVILEGE ) : "memory" );
  182. /**
  183. * @brief Lowers the privilege level by setting the bit 0 of the CONTROL
  184. * register.
  185. */
  186. #define portRESET_PRIVILEGE() vResetPrivilege()
  187. /*-----------------------------------------------------------*/
  188. portFORCE_INLINE static BaseType_t xPortIsInsideInterrupt( void )
  189. {
  190. uint32_t ulCurrentInterrupt;
  191. BaseType_t xReturn;
  192. /* Obtain the number of the currently executing interrupt. */
  193. __asm volatile ( "mrs %0, ipsr" : "=r" ( ulCurrentInterrupt )::"memory" );
  194. if( ulCurrentInterrupt == 0 )
  195. {
  196. xReturn = pdFALSE;
  197. }
  198. else
  199. {
  200. xReturn = pdTRUE;
  201. }
  202. return xReturn;
  203. }
  204. /*-----------------------------------------------------------*/
  205. portFORCE_INLINE static void vPortRaiseBASEPRI( void )
  206. {
  207. uint32_t ulNewBASEPRI;
  208. __asm volatile
  209. (
  210. " mov %0, %1 \n"\
  211. " msr basepri, %0 \n"\
  212. " isb \n"\
  213. " dsb \n"\
  214. : "=r" ( ulNewBASEPRI ) : "i" ( configMAX_SYSCALL_INTERRUPT_PRIORITY ) : "memory"
  215. );
  216. }
  217. /*-----------------------------------------------------------*/
  218. portFORCE_INLINE static uint32_t ulPortRaiseBASEPRI( void )
  219. {
  220. uint32_t ulOriginalBASEPRI, ulNewBASEPRI;
  221. __asm volatile
  222. (
  223. " mrs %0, basepri \n"\
  224. " mov %1, %2 \n"\
  225. " msr basepri, %1 \n"\
  226. " isb \n"\
  227. " dsb \n"\
  228. : "=r" ( ulOriginalBASEPRI ), "=r" ( ulNewBASEPRI ) : "i" ( configMAX_SYSCALL_INTERRUPT_PRIORITY ) : "memory"
  229. );
  230. /* This return will not be reached but is necessary to prevent compiler
  231. * warnings. */
  232. return ulOriginalBASEPRI;
  233. }
  234. /*-----------------------------------------------------------*/
  235. portFORCE_INLINE static void vPortSetBASEPRI( uint32_t ulNewMaskValue )
  236. {
  237. __asm volatile
  238. (
  239. " msr basepri, %0 "::"r" ( ulNewMaskValue ) : "memory"
  240. );
  241. }
  242. /*-----------------------------------------------------------*/
  243. #define portMEMORY_BARRIER() __asm volatile ( "" ::: "memory" )
  244. #ifndef configENFORCE_SYSTEM_CALLS_FROM_KERNEL_ONLY
  245. #warning "configENFORCE_SYSTEM_CALLS_FROM_KERNEL_ONLY is not defined. We recommend defining it to 1 in FreeRTOSConfig.h for better security. https://www.FreeRTOS.org/FreeRTOS-V10.3.x.html"
  246. #define configENFORCE_SYSTEM_CALLS_FROM_KERNEL_ONLY 0
  247. #endif
  248. /*-----------------------------------------------------------*/
  249. #ifdef __cplusplus
  250. }
  251. #endif
  252. #endif /* PORTMACRO_H */