portmacro.h 9.3 KB

123456789101112131415161718192021222324252627282930313233343536373839404142434445464748495051525354555657585960616263646566676869707172737475767778798081828384858687888990919293949596979899100101102103104105106107108109110111112113114115116117118119120121122123124125126127128129130131132133134135136137138139140141142143144145146147148149150151152153154155156157158159160161162163164165166167168169170171172173174175176177178179180181182183184185186187188189190191192193194195196197198199200201202203204205206207208209210211212213214215216217218219220221222223224225226227228229230231232233234235236237238239240241242243244
  1. /*
  2. * FreeRTOS Kernel V10.4.3 LTS Patch 2
  3. * Copyright (C) 2020 Amazon.com, Inc. or its affiliates. All Rights Reserved.
  4. *
  5. * Permission is hereby granted, free of charge, to any person obtaining a copy of
  6. * this software and associated documentation files (the "Software"), to deal in
  7. * the Software without restriction, including without limitation the rights to
  8. * use, copy, modify, merge, publish, distribute, sublicense, and/or sell copies of
  9. * the Software, and to permit persons to whom the Software is furnished to do so,
  10. * subject to the following conditions:
  11. *
  12. * The above copyright notice and this permission notice shall be included in all
  13. * copies or substantial portions of the Software.
  14. *
  15. * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
  16. * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, FITNESS
  17. * FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR
  18. * COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER
  19. * IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN
  20. * CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
  21. *
  22. * https://www.FreeRTOS.org
  23. * https://github.com/FreeRTOS
  24. *
  25. * 1 tab == 4 spaces!
  26. */
  27. #ifndef PORTMACRO_H
  28. #define PORTMACRO_H
  29. #ifdef __cplusplus
  30. extern "C" {
  31. #endif
  32. /*-----------------------------------------------------------
  33. * Port specific definitions.
  34. *
  35. * The settings in this file configure FreeRTOS correctly for the
  36. * given hardware and compiler.
  37. *
  38. * These settings should not be altered.
  39. *-----------------------------------------------------------
  40. */
  41. /* Type definitions. */
  42. #define portCHAR char
  43. #define portFLOAT float
  44. #define portDOUBLE double
  45. #define portLONG long
  46. #define portSHORT short
  47. #define portSTACK_TYPE uint32_t
  48. #define portBASE_TYPE long
  49. typedef portSTACK_TYPE StackType_t;
  50. typedef long BaseType_t;
  51. typedef unsigned long UBaseType_t;
  52. #if ( configUSE_16_BIT_TICKS == 1 )
  53. typedef uint16_t TickType_t;
  54. #define portMAX_DELAY ( TickType_t ) 0xffff
  55. #else
  56. typedef uint32_t TickType_t;
  57. #define portMAX_DELAY ( TickType_t ) 0xffffffffUL
  58. /* 32-bit tick type on a 32-bit architecture, so reads of the tick count do
  59. * not need to be guarded with a critical section. */
  60. #define portTICK_TYPE_IS_ATOMIC 1
  61. #endif
  62. /*-----------------------------------------------------------*/
  63. /* Architecture specifics. */
  64. #define portSTACK_GROWTH ( -1 )
  65. #define portTICK_PERIOD_MS ( ( TickType_t ) 1000 / configTICK_RATE_HZ )
  66. #define portBYTE_ALIGNMENT 8
  67. #define portDONT_DISCARD __attribute__( ( used ) )
  68. /*-----------------------------------------------------------*/
  69. /* Scheduler utilities. */
  70. #define portYIELD() \
  71. { \
  72. /* Set a PendSV to request a context switch. */ \
  73. portNVIC_INT_CTRL_REG = portNVIC_PENDSVSET_BIT; \
  74. \
  75. /* Barriers are normally not required but do ensure the code is completely \
  76. * within the specified behaviour for the architecture. */ \
  77. __asm volatile ( "dsb" ::: "memory" ); \
  78. __asm volatile ( "isb" ); \
  79. }
  80. #define portNVIC_INT_CTRL_REG ( *( ( volatile uint32_t * ) 0xe000ed04 ) )
  81. #define portNVIC_PENDSVSET_BIT ( 1UL << 28UL )
  82. #define portEND_SWITCHING_ISR( xSwitchRequired ) if( xSwitchRequired != pdFALSE ) portYIELD()
  83. #define portYIELD_FROM_ISR( x ) portEND_SWITCHING_ISR( x )
  84. /*-----------------------------------------------------------*/
  85. /* Critical section management. */
  86. extern void vPortEnterCritical( void );
  87. extern void vPortExitCritical( void );
  88. #define portSET_INTERRUPT_MASK_FROM_ISR() ulPortRaiseBASEPRI()
  89. #define portCLEAR_INTERRUPT_MASK_FROM_ISR( x ) vPortSetBASEPRI( x )
  90. #define portDISABLE_INTERRUPTS() vPortRaiseBASEPRI()
  91. #define portENABLE_INTERRUPTS() vPortSetBASEPRI( 0 )
  92. #define portENTER_CRITICAL() vPortEnterCritical()
  93. #define portEXIT_CRITICAL() vPortExitCritical()
  94. /*-----------------------------------------------------------*/
  95. /* Task function macros as described on the FreeRTOS.org WEB site. These are
  96. * not necessary for to use this port. They are defined so the common demo files
  97. * (which build with all the ports) will build. */
  98. #define portTASK_FUNCTION_PROTO( vFunction, pvParameters ) void vFunction( void * pvParameters )
  99. #define portTASK_FUNCTION( vFunction, pvParameters ) void vFunction( void * pvParameters )
  100. /*-----------------------------------------------------------*/
  101. /* Tickless idle/low power functionality. */
  102. #ifndef portSUPPRESS_TICKS_AND_SLEEP
  103. extern void vPortSuppressTicksAndSleep( TickType_t xExpectedIdleTime );
  104. #define portSUPPRESS_TICKS_AND_SLEEP( xExpectedIdleTime ) vPortSuppressTicksAndSleep( xExpectedIdleTime )
  105. #endif
  106. /*-----------------------------------------------------------*/
  107. /* Architecture specific optimisations. */
  108. #ifndef configUSE_PORT_OPTIMISED_TASK_SELECTION
  109. #define configUSE_PORT_OPTIMISED_TASK_SELECTION 1
  110. #endif
  111. #if configUSE_PORT_OPTIMISED_TASK_SELECTION == 1
  112. /* Generic helper function. */
  113. __attribute__( ( always_inline ) ) static inline uint8_t ucPortCountLeadingZeros( uint32_t ulBitmap )
  114. {
  115. uint8_t ucReturn;
  116. __asm volatile ( "clz %0, %1" : "=r" ( ucReturn ) : "r" ( ulBitmap ) : "memory" );
  117. return ucReturn;
  118. }
  119. /* Check the configuration. */
  120. #if ( configMAX_PRIORITIES > 32 )
  121. #error configUSE_PORT_OPTIMISED_TASK_SELECTION can only be set to 1 when configMAX_PRIORITIES is less than or equal to 32. It is very rare that a system requires more than 10 to 15 difference priorities as tasks that share a priority will time slice.
  122. #endif
  123. /* Store/clear the ready priorities in a bit map. */
  124. #define portRECORD_READY_PRIORITY( uxPriority, uxReadyPriorities ) ( uxReadyPriorities ) |= ( 1UL << ( uxPriority ) )
  125. #define portRESET_READY_PRIORITY( uxPriority, uxReadyPriorities ) ( uxReadyPriorities ) &= ~( 1UL << ( uxPriority ) )
  126. /*-----------------------------------------------------------*/
  127. #define portGET_HIGHEST_PRIORITY( uxTopPriority, uxReadyPriorities ) uxTopPriority = ( 31UL - ( uint32_t ) ucPortCountLeadingZeros( ( uxReadyPriorities ) ) )
  128. #endif /* configUSE_PORT_OPTIMISED_TASK_SELECTION */
  129. /*-----------------------------------------------------------*/
  130. #ifdef configASSERT
  131. void vPortValidateInterruptPriority( void );
  132. #define portASSERT_IF_INTERRUPT_PRIORITY_INVALID() vPortValidateInterruptPriority()
  133. #endif
  134. /* portNOP() is not required by this port. */
  135. #define portNOP()
  136. #define portINLINE __inline
  137. #ifndef portFORCE_INLINE
  138. #define portFORCE_INLINE inline __attribute__( ( always_inline ) )
  139. #endif
  140. portFORCE_INLINE static BaseType_t xPortIsInsideInterrupt( void )
  141. {
  142. uint32_t ulCurrentInterrupt;
  143. BaseType_t xReturn;
  144. /* Obtain the number of the currently executing interrupt. */
  145. __asm volatile ( "mrs %0, ipsr" : "=r" ( ulCurrentInterrupt )::"memory" );
  146. if( ulCurrentInterrupt == 0 )
  147. {
  148. xReturn = pdFALSE;
  149. }
  150. else
  151. {
  152. xReturn = pdTRUE;
  153. }
  154. return xReturn;
  155. }
  156. /*-----------------------------------------------------------*/
  157. portFORCE_INLINE static void vPortRaiseBASEPRI( void )
  158. {
  159. uint32_t ulNewBASEPRI;
  160. __asm volatile
  161. (
  162. " mov %0, %1 \n"\
  163. " msr basepri, %0 \n"\
  164. " isb \n"\
  165. " dsb \n"\
  166. : "=r" ( ulNewBASEPRI ) : "i" ( configMAX_SYSCALL_INTERRUPT_PRIORITY ) : "memory"
  167. );
  168. }
  169. /*-----------------------------------------------------------*/
  170. portFORCE_INLINE static uint32_t ulPortRaiseBASEPRI( void )
  171. {
  172. uint32_t ulOriginalBASEPRI, ulNewBASEPRI;
  173. __asm volatile
  174. (
  175. " mrs %0, basepri \n"\
  176. " mov %1, %2 \n"\
  177. " msr basepri, %1 \n"\
  178. " isb \n"\
  179. " dsb \n"\
  180. : "=r" ( ulOriginalBASEPRI ), "=r" ( ulNewBASEPRI ) : "i" ( configMAX_SYSCALL_INTERRUPT_PRIORITY ) : "memory"
  181. );
  182. /* This return will not be reached but is necessary to prevent compiler
  183. * warnings. */
  184. return ulOriginalBASEPRI;
  185. }
  186. /*-----------------------------------------------------------*/
  187. portFORCE_INLINE static void vPortSetBASEPRI( uint32_t ulNewMaskValue )
  188. {
  189. __asm volatile
  190. (
  191. " msr basepri, %0 "::"r" ( ulNewMaskValue ) : "memory"
  192. );
  193. }
  194. /*-----------------------------------------------------------*/
  195. #define portMEMORY_BARRIER() __asm volatile ( "" ::: "memory" )
  196. #ifdef __cplusplus
  197. }
  198. #endif
  199. #endif /* PORTMACRO_H */