startup_run_in_ram.s 15 KB

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  1. /*
  2. * Copyright (c) 2022 OpenLuat & AirM2M
  3. *
  4. * Permission is hereby granted, free of charge, to any person obtaining a copy of
  5. * this software and associated documentation files (the "Software"), to deal in
  6. * the Software without restriction, including without limitation the rights to
  7. * use, copy, modify, merge, publish, distribute, sublicense, and/or sell copies of
  8. * the Software, and to permit persons to whom the Software is furnished to do so,
  9. * subject to the following conditions:
  10. *
  11. * The above copyright notice and this permission notice shall be included in all
  12. * copies or substantial portions of the Software.
  13. *
  14. * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
  15. * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, FITNESS
  16. * FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR
  17. * COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER
  18. * IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN
  19. * CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
  20. */
  21. .syntax unified
  22. .cpu cortex-m4
  23. .fpu softvfp
  24. .thumb
  25. .global g_pfnVectors
  26. .global HardFault_Handler
  27. /* start address for the initialization values of the .data section.
  28. defined in linker script */
  29. .word _sidata
  30. /* start address for the .data section. defined in linker script */
  31. .word _sdata
  32. /* end address for the .data section. defined in linker script */
  33. .word _edata
  34. /* start address for the .bss section. defined in linker script */
  35. .word _sbss
  36. /* end address for the .bss section. defined in linker script */
  37. .word _ebss
  38. /* stack used for SystemInit_ExtMemCtl; always internal RAM used */
  39. .word _sitext
  40. .word _sstext
  41. .word _setext
  42. /**
  43. * @brief This is the code that gets called when the processor first
  44. * starts execution following a reset event. Only the absolutely
  45. * necessary set is performed, after which the application
  46. * supplied main() routine is called.
  47. * @param None
  48. * @retval : None
  49. */
  50. .section .text.Reset_Handler
  51. .weak Reset_Handler
  52. .type Reset_Handler, %function
  53. Reset_Handler:
  54. movs r0, #0
  55. movs r1, #0
  56. movs r2, #0
  57. movs r3, #0
  58. movs r4, #0
  59. movs r5, #0
  60. movs r6, #0
  61. movs r7, #0
  62. LDR R0, =g_pfnVectors
  63. LDR R1, =0xE000ED08
  64. STR R0,[R1]
  65. ldr sp, =_estack /* set stack pointer */
  66. /* Copy the data segment initializers from flash to SRAM */
  67. movs r1, #0
  68. b LoopCopyTextInit
  69. CopyTextInit:
  70. ldr r3, =_sitext
  71. ldr r3, [r3, r1]
  72. str r3, [r0, r1]
  73. adds r1, r1, #4
  74. LoopCopyTextInit:
  75. ldr r0, =_sstext
  76. ldr r3, =_setext
  77. adds r2, r0, r1
  78. cmp r2, r3
  79. bcc CopyTextInit
  80. movs r1, #0
  81. b LoopCopyDataInit
  82. CopyDataInit:
  83. ldr r3, =_sidata
  84. ldr r3, [r3, r1]
  85. str r3, [r0, r1]
  86. adds r1, r1, #4
  87. LoopCopyDataInit:
  88. ldr r0, =_sdata
  89. ldr r3, =_edata
  90. adds r2, r0, r1
  91. cmp r2, r3
  92. bcc CopyDataInit
  93. ldr r2, =_sbss
  94. b LoopFillZerobss
  95. /* Zero fill the bss segment. */
  96. FillZerobss:
  97. movs r3, #0
  98. str r3, [r2], #4
  99. LoopFillZerobss:
  100. ldr r3, = _ebss
  101. cmp r2, r3
  102. bcc FillZerobss
  103. /* Call the clock system intitialization function.*/
  104. bl SystemInit
  105. /* Call static constructors */
  106. bl __libc_init_array /*目前看来这个没什么用,如果代码量有超可以去掉*/
  107. /* Call the application's entry point.*/
  108. bl main
  109. bx lr
  110. .size Reset_Handler, .-Reset_Handler
  111. /**
  112. * @brief This is the code that gets called when the processor receives an
  113. * unexpected interrupt. This simply enters an infinite loop, preserving
  114. * the system state for examination by a debugger.
  115. * @param None
  116. * @retval None
  117. */
  118. .section .text.Default_Handler,"ax",%progbits
  119. Default_Handler:
  120. Infinite_Loop:
  121. b Infinite_Loop
  122. .size Default_Handler, .-Default_Handler
  123. /******************************************************************************
  124. *
  125. * The minimal vector table for a Cortex M3. Note that the proper constructs
  126. * must be placed on this to ensure that it ends up at physical address
  127. * 0x0000.0000.
  128. *
  129. *******************************************************************************/
  130. .section .isr_vector,"a",%progbits
  131. .type g_pfnVectors, %object
  132. .size g_pfnVectors, .-g_pfnVectors
  133. g_pfnVectors:
  134. .word _estack
  135. .word Reset_Handler
  136. .word NMI_Handler
  137. .word HardFault_Handler
  138. .word MemManage_Handler
  139. .word BusFault_Handler
  140. .word UsageFault_Handler
  141. .word 0
  142. .word 0
  143. .word 0
  144. .word 0
  145. .word SVC_Handler
  146. .word DebugMon_Handler
  147. .word 0
  148. .word PendSV_Handler
  149. .word SysTick_Handler
  150. /* External Interrupts */
  151. .word ISR_GlobalHandler /* Window WatchDog */
  152. .word ISR_GlobalHandler /* PVD through EXTI Line detection */
  153. .word ISR_GlobalHandler /* Tamper and TimeStamps through the EXTI line */
  154. .word ISR_GlobalHandler /* RTC Wakeup through the EXTI line */
  155. .word ISR_GlobalHandler /* FLASH */
  156. .word ISR_GlobalHandler /* RCC */
  157. .word ISR_GlobalHandler /* EXTI Line0 */
  158. .word ISR_GlobalHandler /* EXTI Line1 */
  159. .word ISR_GlobalHandler /* EXTI Line2 */
  160. .word ISR_GlobalHandler /* EXTI Line3 */
  161. .word ISR_GlobalHandler /* EXTI Line4 */
  162. .word ISR_GlobalHandler /* DMA1 Stream 0 */
  163. .word ISR_GlobalHandler /* DMA1 Stream 1 */
  164. .word ISR_GlobalHandler /* DMA1 Stream 2 */
  165. .word ISR_GlobalHandler /* DMA1 Stream 3 */
  166. .word ISR_GlobalHandler /* DMA1 Stream 4 */
  167. .word ISR_GlobalHandler /* DMA1 Stream 5 */
  168. .word ISR_GlobalHandler /* DMA1 Stream 6 */
  169. .word ISR_GlobalHandler /* ADC1, ADC2 and ADC3s */
  170. .word ISR_GlobalHandler /* CAN1 TX */
  171. .word ISR_GlobalHandler /* CAN1 RX0 */
  172. .word ISR_GlobalHandler /* CAN1 RX1 */
  173. .word ISR_GlobalHandler /* CAN1 SCE */
  174. .word ISR_GlobalHandler /* External Line[9:5]s */
  175. .word ISR_GlobalHandler /* TIM1 Break and TIM9 */
  176. .word ISR_GlobalHandler /* TIM1 Update and TIM10 */
  177. .word ISR_GlobalHandler /* TIM1 Trigger and Commutation and TIM11 */
  178. .word ISR_GlobalHandler /* TIM1 Capture Compare */
  179. .word ISR_GlobalHandler /* TIM2 */
  180. .word ISR_GlobalHandler /* TIM3 */
  181. .word ISR_GlobalHandler /* TIM4 */
  182. .word ISR_GlobalHandler /* I2C1 Event */
  183. .word ISR_GlobalHandler /* I2C1 Error */
  184. .word ISR_GlobalHandler /* I2C2 Event */
  185. .word ISR_GlobalHandler /* I2C2 Error */
  186. .word ISR_GlobalHandler /* SPI1 */
  187. .word ISR_GlobalHandler /* SPI2 */
  188. .word ISR_GlobalHandler /* USART1 */
  189. .word ISR_GlobalHandler /* USART2 */
  190. .word ISR_GlobalHandler /* USART3 */
  191. .word ISR_GlobalHandler /* External Line[15:10]s */
  192. .word ISR_GlobalHandler /* RTC Alarm (A and B) through EXTI Line */
  193. .word ISR_GlobalHandler /* USB OTG FS Wakeup through EXTI line */
  194. .word ISR_GlobalHandler /* TIM8 Break and TIM12 */
  195. .word ISR_GlobalHandler /* TIM8 Update and TIM13 */
  196. .word ISR_GlobalHandler /* TIM8 Trigger and Commutation and TIM14 */
  197. .word ISR_GlobalHandler /* TIM8 Capture Compare */
  198. .word ISR_GlobalHandler /* DMA1 Stream7 */
  199. .word ISR_GlobalHandler /* FSMC */
  200. .word ISR_GlobalHandler /* SDIO */
  201. .word ISR_GlobalHandler /* TIM5 */
  202. .word ISR_GlobalHandler /* SPI3 */
  203. .word ISR_GlobalHandler /* UART4 */
  204. .word ISR_GlobalHandler /* UART5 */
  205. .word ISR_GlobalHandler /* TIM6 and DAC1&2 underrun errors */
  206. .word ISR_GlobalHandler /* TIM7 */
  207. .word ISR_GlobalHandler /* DMA2 Stream 0 */
  208. .word ISR_GlobalHandler /* DMA2 Stream 1 */
  209. .word ISR_GlobalHandler /* DMA2 Stream 2 */
  210. .word ISR_GlobalHandler /* DMA2 Stream 3 */
  211. .word ISR_GlobalHandler /* DMA2 Stream 4 */
  212. .word ISR_GlobalHandler /* Ethernet */
  213. .word ISR_GlobalHandler /* Ethernet Wakeup through EXTI line */
  214. .word ISR_GlobalHandler /* CAN2 TX */
  215. .word ISR_GlobalHandler /* CAN2 RX0 */
  216. .word ISR_GlobalHandler /* CAN2 RX1 */
  217. .word ISR_GlobalHandler /* CAN2 SCE */
  218. .word ISR_GlobalHandler /* USB OTG FS */
  219. .word ISR_GlobalHandler /* DMA2 Stream 5 */
  220. .word ISR_GlobalHandler /* DMA2 Stream 6 */
  221. .word ISR_GlobalHandler /* DMA2 Stream 7 */
  222. .word ISR_GlobalHandler /* USART6 */
  223. .word ISR_GlobalHandler /* I2C3 event */
  224. .word ISR_GlobalHandler /* I2C3 error */
  225. .word ISR_GlobalHandler /* USB OTG HS End Point 1 Out */
  226. .word ISR_GlobalHandler /* USB OTG HS End Point 1 In */
  227. .word ISR_GlobalHandler /* USB OTG HS Wakeup through EXTI */
  228. .word ISR_GlobalHandler /* USB OTG HS */
  229. .word ISR_GlobalHandler /* DCMI */
  230. .word ISR_GlobalHandler /* CRYP crypto */
  231. .word ISR_GlobalHandler /* Hash and Rng */
  232. .word ISR_GlobalHandler /* FPU */
  233. .word ISR_GlobalHandler /* UART7 */
  234. .word ISR_GlobalHandler /* UART8 */
  235. .word ISR_GlobalHandler /* SPI4 */
  236. .word ISR_GlobalHandler /* SPI5 */
  237. .word ISR_GlobalHandler /* SPI6 */
  238. .word ISR_GlobalHandler /* SAI1 */
  239. .word ISR_GlobalHandler /* LTDC_IRQHandler */
  240. .word ISR_GlobalHandler /* LTDC_ER_IRQHandler */
  241. .word ISR_GlobalHandler /* DMA2D
  242. /*******************************************************************************
  243. *
  244. * Provide weak aliases for each Exception handler to the Default_Handler.
  245. * As they are weak aliases, any function with the same name will override
  246. * this definition.
  247. *
  248. *******************************************************************************/
  249. .weak NMI_Handler
  250. .thumb_set NMI_Handler,Default_Handler
  251. .section .text.CmTrace_Handler
  252. .type CmTrace_Handler, %function
  253. CmTrace_Handler:
  254. MOV r0, lr /* get lr */
  255. MOV r1, sp /* get stack pointer (current is MSP) */
  256. BL cm_backtrace_fault
  257. Fault_Loop:
  258. BL Fault_Loop /* while(1) */
  259. .weak NMI_Handler
  260. .thumb_set NMI_Handler,CmTrace_Handler
  261. .weak HardFault_Handler
  262. .thumb_set HardFault_Handler,CmTrace_Handler
  263. .weak MemManage_Handler
  264. .thumb_set MemManage_Handler,CmTrace_Handler
  265. .weak BusFault_Handler
  266. .thumb_set BusFault_Handler,CmTrace_Handler
  267. .weak UsageFault_Handler
  268. .thumb_set UsageFault_Handler,CmTrace_Handler
  269. .weak SVC_Handler
  270. .thumb_set SVC_Handler,Default_Handler
  271. .weak DebugMon_Handler
  272. .thumb_set DebugMon_Handler,Default_Handler
  273. .weak PendSV_Handler
  274. .thumb_set PendSV_Handler,Default_Handler
  275. .weak SysTick_Handler
  276. .thumb_set SysTick_Handler,Default_Handler
  277. .weak ISR_GlobalHandler
  278. .thumb_set ISR_GlobalHandler,Default_Handler
  279. /************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/