bl_main.c 17 KB

123456789101112131415161718192021222324252627282930313233343536373839404142434445464748495051525354555657585960616263646566676869707172737475767778798081828384858687888990919293949596979899100101102103104105106107108109110111112113114115116117118119120121122123124125126127128129130131132133134135136137138139140141142143144145146147148149150151152153154155156157158159160161162163164165166167168169170171172173174175176177178179180181182183184185186187188189190191192193194195196197198199200201202203204205206207208209210211212213214215216217218219220221222223224225226227228229230231232233234235236237238239240241242243244245246247248249250251252253254255256257258259260261262263264265266267268269270271272273274275276277278279280281282283284285286287288289290291292293294295296297298299300301302303304305306307308309310311312313314315316317318319320321322323324325326327328329330331332333334335336337338339340341342343344345346347348349350351352353354355356357358359360361362363364365366367368369370371372373374375376377378379380381382383384385386387388389390391392393394395396397398399400401402403404405406407408409410411412413414415416417418419420421422423424425426427428429430431432433434435436437438439440441442443444445446447448449450451452453454455456457458459460461462463464465466467468469470471472473474475476477478479480481482483484485486487488489490491492493494495496497498499500501502503504505506507508509510511512513514515516517518519520521522523524525526527528529530531532533534535536537538539540541542543544545546547548549550551552553554555556557558559560561562563564565566567568569570571572573574575576577578579580581582583584585586587588589590591592593594595596597598599600601602603604605606607608609610611612613614615616617618619620621622623624625626627628629630631632633634635636637638639640641642643644645646647648
  1. /*
  2. * Copyright (c) 2022 OpenLuat & AirM2M
  3. *
  4. * Permission is hereby granted, free of charge, to any person obtaining a copy of
  5. * this software and associated documentation files (the "Software"), to deal in
  6. * the Software without restriction, including without limitation the rights to
  7. * use, copy, modify, merge, publish, distribute, sublicense, and/or sell copies of
  8. * the Software, and to permit persons to whom the Software is furnished to do so,
  9. * subject to the following conditions:
  10. *
  11. * The above copyright notice and this permission notice shall be included in all
  12. * copies or substantial portions of the Software.
  13. *
  14. * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
  15. * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, FITNESS
  16. * FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR
  17. * COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER
  18. * IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN
  19. * CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
  20. */
  21. #include "user.h"
  22. #include "Lzmalib.h"
  23. extern const uint32_t __isr_start_address;
  24. extern const uint32_t __os_heap_start;
  25. extern const uint32_t __ram_end;
  26. uint32_t SystemCoreClock;
  27. #define FW_UPGRADE_START_TIME 300
  28. #define FW_UPGRADE_ALL_TIME 2000
  29. #define FW_UPGRADE_DATA_TIME 50
  30. #define FW_OTA_FLASH_BUF_LEN 4096
  31. enum
  32. {
  33. FW_UPGRADE_STATE_IDLE,
  34. FW_UPGRADE_STATE_START,
  35. FW_UPGRADE_STATE_RUN,
  36. FW_UPGRADE_STATE_WAIT_END,
  37. };
  38. typedef struct
  39. {
  40. Buffer_Struct FWDataBuffer;
  41. uint32_t FWStartAddress;
  42. uint32_t FWTotalLen;
  43. uint32_t FWCRC32;
  44. uint32_t NextLzmaAddress;
  45. // uint32_t XferLen;
  46. uint8_t *NextLzmaData;
  47. uint32_t NextLzmaDataLen;
  48. uint8_t NextLzmaHeader[LZMA_PROPS_SIZE + 8];
  49. uint32_t NextLzmaHeaderSize;
  50. uint32_t CurSPIFlashStart;
  51. uint32_t NextSPIFlashStart;
  52. uint8_t *CurSPIFlashData;
  53. uint8_t *NextSPIFlashData;
  54. uint8_t State;
  55. uint8_t ForceOut;
  56. uint8_t SPIFlashReadDone;
  57. }BL_CtrlStuct;
  58. #define BL_DBG DBG_INFO
  59. //#define BL_DBG(X, Y...)
  60. typedef void (*pFunction)(void);
  61. static uint32_t CRC32_Table[256];
  62. static BL_CtrlStuct prvBL;
  63. static SPIFlash_CtrlStruct prvSPIFlash;
  64. void Jump_AppRun(uint32_t Address)
  65. {
  66. /* Jump to user application */
  67. pFunction Jump_To_Application;
  68. uint32_t JumpAddress;
  69. __disable_irq();
  70. DBG_INFO("jump to 0x%x !", Address);
  71. JumpAddress = *(__IO uint32_t*) (Address + 4);
  72. Jump_To_Application = (pFunction) JumpAddress;
  73. /* Initialize user application's Stack Pointer */
  74. __set_MSP(*(__IO uint32_t*) Address);
  75. /* Jump to application */
  76. Jump_To_Application();
  77. }
  78. uint8_t BL_CheckFlashPage(uint32_t Page, uint32_t Address)
  79. {
  80. uint32_t EndAddress = Page * __FLASH_SECTOR_SIZE__ ;
  81. if (Address >= EndAddress)
  82. {
  83. return 1;
  84. }
  85. else
  86. {
  87. return 0;
  88. }
  89. }
  90. uint32_t BL_GetFlashPage(uint32_t Address)
  91. {
  92. return Address/__FLASH_SECTOR_SIZE__;
  93. }
  94. void BL_UnlockFlash(void)
  95. {
  96. }
  97. void BL_LockFlash(void)
  98. {
  99. }
  100. void BL_EraseSector(uint32_t address)
  101. {
  102. Flash_EraseSector(address, 0);
  103. // BL_DBG("%x", address);
  104. // FLASH_EraseSector(address);
  105. // CACHE_CleanAll(CACHE);
  106. }
  107. static void BL_OTAErase(uint32_t Address, uint32_t Len)
  108. {
  109. uint32_t Pos = 0;
  110. while(Pos < Len)
  111. {
  112. Flash_EraseSector(Address + Pos, 0);
  113. Pos += __FLASH_SECTOR_SIZE__;
  114. }
  115. }
  116. static void BL_OTAWrite(uint32_t Address, uint8_t *Data, uint32_t Len)
  117. {
  118. uint32_t Pos = 0;
  119. while(Pos < Len)
  120. {
  121. if ((Len - Pos) > __FLASH_PAGE_SIZE__)
  122. {
  123. Flash_ProgramData(Address + Pos, Data + Pos, __FLASH_PAGE_SIZE__, 0);
  124. Pos += __FLASH_PAGE_SIZE__;
  125. }
  126. else
  127. {
  128. Flash_ProgramData(Address + Pos, Data + Pos, Len - Pos, 0);
  129. Pos += Len - Pos;
  130. }
  131. }
  132. }
  133. void FileSystem_Init(void)
  134. {
  135. }
  136. int32_t BL_StartNewDownload(uint32_t Address, uint32_t TotalLen, uint32_t CRC32)
  137. {
  138. if (prvBL.State != FW_UPGRADE_STATE_IDLE)
  139. {
  140. return -1;
  141. }
  142. prvBL.FWStartAddress = Address;
  143. prvBL.FWTotalLen = TotalLen;
  144. prvBL.FWCRC32 = CRC32;
  145. prvBL.State = FW_UPGRADE_STATE_START;
  146. prvBL.NextLzmaAddress = 0;
  147. // prvBL.XferLen = 0;
  148. return 0;
  149. }
  150. int BL_DownloadAddData(uint32_t PacketSn, uint8_t *Data, uint32_t Len, uint32_t *NextPacketSn)
  151. {
  152. uint32_t RestLen = prvBL.FWDataBuffer.MaxLen - prvBL.FWDataBuffer.Pos;
  153. if (prvBL.NextLzmaAddress != PacketSn)
  154. {
  155. *NextPacketSn = prvBL.NextLzmaAddress;
  156. return -1;
  157. }
  158. else
  159. {
  160. // prvBL.XferLen += Len;
  161. prvBL.NextLzmaAddress += Len;
  162. *NextPacketSn = prvBL.NextLzmaAddress;
  163. Buffer_StaticWrite(&prvBL.FWDataBuffer, Data, Len);
  164. if (prvBL.NextLzmaData)
  165. {
  166. return 60000;
  167. }
  168. else
  169. {
  170. return 1;
  171. }
  172. }
  173. }
  174. uint8_t BL_DownloadEnd(void)
  175. {
  176. if (prvBL.State != FW_UPGRADE_STATE_RUN)
  177. {
  178. return ERROR_OPERATION_FAILED;
  179. }
  180. prvBL.State = FW_UPGRADE_STATE_WAIT_END;
  181. return ERROR_NONE;
  182. }
  183. uint8_t BL_RunAPP(void)
  184. {
  185. prvBL.ForceOut = 1;
  186. }
  187. uint8_t BL_RunLzmaBlock(uint8_t *Head, uint8_t HeadLen)
  188. {
  189. if (!prvBL.FWDataBuffer.Pos) return ERROR_NONE;
  190. if (!prvBL.NextLzmaData)
  191. {
  192. memcpy(prvBL.NextLzmaHeader, Head, HeadLen);
  193. prvBL.NextLzmaHeaderSize = HeadLen;
  194. prvBL.NextLzmaData = prvBL.FWDataBuffer.Data;
  195. prvBL.NextLzmaDataLen = prvBL.FWDataBuffer.Pos;
  196. OS_InitBuffer(&prvBL.FWDataBuffer, SPI_FLASH_BLOCK_SIZE);
  197. prvBL.NextLzmaAddress = 0;
  198. return ERROR_NONE;
  199. }
  200. else
  201. {
  202. return ERROR_BUFFER_FULL;
  203. }
  204. }
  205. void Local_Upgrade(void)
  206. {
  207. uint8_t *FullData = malloc(SPI_FLASH_BLOCK_SIZE);
  208. uint32_t FinishLen = 0;
  209. uint32_t ProgramLen, CRC32, i;
  210. uint64_t AllToTick = GetSysTick() + FW_UPGRADE_START_TIME * CORE_TICK_1MS;
  211. uint64_t DataToTick = GetSysTick() + FW_UPGRADE_DATA_TIME * CORE_TICK_1MS;
  212. uint8_t ConnectCnt = 0;
  213. uint8_t ConnectOK = 0;
  214. uint8_t *CurLzmaData = NULL;
  215. uint32_t CurLzmaDataLen;
  216. uint8_t CurLzmaHead[LZMA_PROPS_SIZE + 8];
  217. uint8_t CurLzmaHeadLen;
  218. DBG_Response(DBG_DEVICE_FW_UPGRADE_READY, ERROR_NONE, &ConnectCnt, 1);
  219. while(!prvBL.ForceOut)
  220. {
  221. WDT_Feed();
  222. switch(prvBL.State)
  223. {
  224. case FW_UPGRADE_STATE_IDLE:
  225. if (DataToTick <= GetSysTick())
  226. {
  227. ConnectCnt++;
  228. DataToTick = GetSysTick() + FW_UPGRADE_DATA_TIME * CORE_TICK_1MS;
  229. DBG_Response(DBG_DEVICE_FW_UPGRADE_READY, ERROR_NONE, &ConnectCnt, 1);
  230. }
  231. break;
  232. case FW_UPGRADE_STATE_START:
  233. AllToTick = GetSysTick() + FW_UPGRADE_ALL_TIME * CORE_TICK_1MS;
  234. prvBL.State = FW_UPGRADE_STATE_RUN;
  235. uint8_t *CurLzmaData = NULL;
  236. prvBL.NextLzmaData = NULL;
  237. // prvBL.XferLen = 0;
  238. FinishLen = 0;
  239. ConnectOK = 1;
  240. break;
  241. case FW_UPGRADE_STATE_RUN:
  242. case FW_UPGRADE_STATE_WAIT_END:
  243. if (prvBL.NextLzmaData)
  244. {
  245. WDT_Feed();
  246. CurLzmaData = prvBL.NextLzmaData;
  247. CurLzmaDataLen = prvBL.NextLzmaDataLen;
  248. memcpy(CurLzmaHead, prvBL.NextLzmaHeader, prvBL.NextLzmaHeaderSize);
  249. CurLzmaHeadLen = prvBL.NextLzmaHeaderSize;
  250. prvBL.NextLzmaData = NULL;
  251. ProgramLen = __FLASH_BLOCK_SIZE__;
  252. LzmaUncompress(FullData, &ProgramLen, CurLzmaData, &CurLzmaDataLen, CurLzmaHead, CurLzmaHeadLen);
  253. Flash_Erase(prvBL.FWStartAddress + FinishLen, __FLASH_BLOCK_SIZE__);
  254. Flash_Program(prvBL.FWStartAddress + FinishLen, FullData, ProgramLen);
  255. free(CurLzmaData);
  256. CurLzmaData = NULL;
  257. FinishLen += ProgramLen;
  258. DataToTick = GetSysTick() + FW_UPGRADE_DATA_TIME * CORE_TICK_1MS;
  259. AllToTick = GetSysTick() + FW_UPGRADE_ALL_TIME * CORE_TICK_1MS;
  260. }
  261. if (FinishLen >= prvBL.FWTotalLen)
  262. {
  263. CACHE_CleanAll(CACHE);
  264. CRC32 = CRC32_Cal(CRC32_Table, prvBL.FWStartAddress, prvBL.FWTotalLen, CRC32_START);
  265. if (CRC32 != prvBL.FWCRC32)
  266. {
  267. DBG_Response(DBG_DEVICE_FW_UPGRADE_RESULT, ERROR_PROTOCL, &CRC32, 4);
  268. }
  269. else
  270. {
  271. DBG_Response(DBG_DEVICE_FW_UPGRADE_RESULT, ERROR_NONE, &CRC32, 4);
  272. }
  273. AllToTick = GetSysTick() + FW_UPGRADE_START_TIME * CORE_TICK_1MS;
  274. prvBL.State = FW_UPGRADE_STATE_IDLE;
  275. DataToTick = GetSysTick() + FW_UPGRADE_DATA_TIME * CORE_TICK_1MS;
  276. }
  277. break;
  278. default:
  279. break;
  280. }
  281. if (AllToTick <= GetSysTick())
  282. {
  283. prvBL.ForceOut = 1;
  284. DBG_Response(DBG_DEVICE_FW_UPGRADE_RESULT, ERROR_TIMEOUT, &ConnectCnt, 1);
  285. }
  286. }
  287. if (ConnectOK)
  288. {
  289. BL_EraseSector(__FLASH_OTA_INFO_ADDR__);
  290. }
  291. free(FullData);
  292. }
  293. static int32_t BL_OTAReadDataInFlash(void *pData, void *pParam)
  294. {
  295. Buffer_Struct *pBuffer = (Buffer_Struct *)pParam;
  296. memcpy(pBuffer->Data, pData, pBuffer->Pos);
  297. return 0;
  298. }
  299. static int32_t BL_OTAReadDataInSpiFlash(void *pData, void *pParam)
  300. {
  301. uint32_t StartAddress = (uint32_t)pData;
  302. Buffer_Struct *pBuffer = (Buffer_Struct *)pParam;
  303. // DBG_INFO("%x,%x,%x,%x,%x", StartAddress, prvBL.CurSPIFlashStart, prvBL.NextSPIFlashStart, prvBL.CurSPIFlashData, prvBL.NextSPIFlashData);
  304. if (prvBL.CurSPIFlashData)
  305. {
  306. if (StartAddress >= prvBL.NextSPIFlashStart)
  307. {
  308. if (!prvBL.SPIFlashReadDone)
  309. {
  310. while(!SPIFlash_WaitOpDone(&prvSPIFlash))
  311. {
  312. ;
  313. }
  314. prvBL.SPIFlashReadDone = 1;
  315. }
  316. free(prvBL.CurSPIFlashData);
  317. prvBL.CurSPIFlashStart = prvBL.NextSPIFlashStart;
  318. prvBL.CurSPIFlashData = prvBL.NextSPIFlashData;
  319. prvBL.NextSPIFlashData = malloc(FW_OTA_FLASH_BUF_LEN);
  320. prvBL.NextSPIFlashStart += FW_OTA_FLASH_BUF_LEN;
  321. SPIFlash_Read(&prvSPIFlash, prvBL.NextSPIFlashStart, prvBL.NextSPIFlashData, FW_OTA_FLASH_BUF_LEN, 1);
  322. prvBL.SPIFlashReadDone = 0;
  323. }
  324. }
  325. else
  326. {
  327. prvBL.CurSPIFlashData = malloc(FW_OTA_FLASH_BUF_LEN);
  328. prvBL.NextSPIFlashData = malloc(FW_OTA_FLASH_BUF_LEN);
  329. SPIFlash_Read(&prvSPIFlash, prvBL.CurSPIFlashStart, prvBL.CurSPIFlashData, FW_OTA_FLASH_BUF_LEN, 1);
  330. while(!SPIFlash_WaitOpDone(&prvSPIFlash))
  331. {
  332. ;
  333. }
  334. SPIFlash_Read(&prvSPIFlash, prvBL.NextSPIFlashStart, prvBL.NextSPIFlashData, FW_OTA_FLASH_BUF_LEN, 1);
  335. prvBL.SPIFlashReadDone = 0;
  336. }
  337. memcpy(pBuffer->Data, prvBL.CurSPIFlashData, pBuffer->Pos);
  338. return 0;
  339. }
  340. static int32_t BL_OTAReadDataInFS(void *pData, void *pParam)
  341. {
  342. Buffer_Struct *pBuffer = (Buffer_Struct *)pParam;
  343. }
  344. static void BL_SpiInit(uint8_t SpiID, uint8_t *Pin)
  345. {
  346. switch(SpiID)
  347. {
  348. case HSPI_ID0:
  349. GPIO_Iomux(GPIOC_12,3);
  350. GPIO_Iomux(GPIOC_13,3);
  351. GPIO_Iomux(GPIOC_15,3);
  352. SYSCTRL->CG_CTRL1 |= SYSCTRL_APBPeriph_HSPI;
  353. break;
  354. case SPI_ID0:
  355. switch(Pin[0])
  356. {
  357. case GPIOB_14:
  358. GPIO_Iomux(GPIOB_14,0);
  359. break;
  360. case GPIOC_14:
  361. GPIO_Iomux(GPIOC_14,2);
  362. break;
  363. }
  364. switch(Pin[1])
  365. {
  366. case GPIOB_15:
  367. GPIO_Iomux(GPIOB_15,0);
  368. break;
  369. case GPIOC_12:
  370. GPIO_Iomux(GPIOC_12,2);
  371. break;
  372. }
  373. switch(Pin[2])
  374. {
  375. case GPIOB_12:
  376. GPIO_Iomux(GPIOB_12,0);
  377. break;
  378. case GPIOC_12:
  379. GPIO_Iomux(GPIOC_12,2);
  380. break;
  381. }
  382. SYSCTRL->CG_CTRL1 |= SYSCTRL_APBPeriph_SPI0;
  383. break;
  384. case SPI_ID1:
  385. GPIO_Iomux(GPIOA_06,3);
  386. GPIO_Iomux(GPIOA_08,3);
  387. GPIO_Iomux(GPIOA_09,3);
  388. SYSCTRL->CG_CTRL1 |= SYSCTRL_APBPeriph_SPI1;
  389. break;
  390. case SPI_ID2:
  391. GPIO_Iomux(GPIOB_02,0);
  392. GPIO_Iomux(GPIOB_04,0);
  393. GPIO_Iomux(GPIOB_05,0);
  394. SYSCTRL->CG_CTRL1 |= SYSCTRL_APBPeriph_SPI2;
  395. break;
  396. }
  397. }
  398. void Remote_Upgrade(void)
  399. {
  400. CoreUpgrade_HeadStruct Head;
  401. Buffer_Struct ReadBuffer;
  402. CBFuncEx_t pReadFunc;
  403. PV_Union uPV, uPin;
  404. uint32_t Check;
  405. uint32_t DoneLen;
  406. int32_t Result;
  407. uint8_t Reboot = 0;
  408. OS_InitBuffer(&ReadBuffer, FW_OTA_FLASH_BUF_LEN);
  409. memcpy(&Head, __FLASH_OTA_INFO_ADDR__, sizeof(CoreUpgrade_HeadStruct));
  410. Check = CRC32_Cal(CRC32_Table, &Head.Param1, sizeof(Head) - 8, 0xffffffff);
  411. if (Head.MaigcNum != __APP_START_MAGIC__)
  412. {
  413. DBG_INFO("no ota info");
  414. return;
  415. }
  416. if (Check != Head.CRC32)
  417. {
  418. DBG_INFO("ota info error");
  419. return;
  420. }
  421. uPV.u32 = Head.Param1;
  422. switch(uPV.u8[1])
  423. {
  424. case CORE_OTA_IN_FLASH:
  425. Check = CRC32_Cal(CRC32_Table, Head.DataStartAddress, Head.DataLen, 0xffffffff);
  426. if (Check != Head.DataCRC32)
  427. {
  428. DBG_INFO("ota file CRC32: %x,%x", Check, Head.DataCRC32);
  429. goto OTA_END;
  430. }
  431. pReadFunc = BL_OTAReadDataInFlash;
  432. break;
  433. case CORE_OTA_OUT_SPI_FLASH:
  434. memset(&prvSPIFlash, 0, sizeof(prvSPIFlash));
  435. prvSPIFlash.SpiID = uPV.u8[2];
  436. uPin.u32 = Head.Param2;
  437. BL_SpiInit(prvSPIFlash.SpiID, uPin.u8);
  438. prvSPIFlash.CSPin = uPin.u8[3];
  439. GPIO_Config(prvSPIFlash.CSPin, 0, 1);
  440. SPI_MasterInit(prvSPIFlash.SpiID, 8, SPI_MODE_0, 24000000, NULL, NULL);
  441. prvSPIFlash.IsBlockMode = 1;
  442. prvSPIFlash.IsSpiDMAMode = 1;
  443. SPI_DMATxInit(prvSPIFlash.SpiID, FLASH_SPI_TX_DMA_STREAM, 0);
  444. SPI_DMARxInit(prvSPIFlash.SpiID, FLASH_SPI_RX_DMA_STREAM, 0);
  445. SPIFlash_Init(&prvSPIFlash, NULL);
  446. prvBL.CurSPIFlashStart = Head.DataStartAddress;
  447. prvBL.NextSPIFlashStart = Head.DataStartAddress + FW_OTA_FLASH_BUF_LEN;
  448. prvBL.CurSPIFlashData = NULL;
  449. prvBL.NextSPIFlashData = NULL;
  450. pReadFunc = BL_OTAReadDataInSpiFlash;
  451. DoneLen = 0;
  452. Check = 0xffffffff;
  453. while(DoneLen < Head.DataLen)
  454. {
  455. if ((Head.DataLen - DoneLen) < SPI_FLASH_BLOCK_SIZE)
  456. {
  457. SPIFlash_Read(&prvSPIFlash, Head.DataStartAddress + DoneLen, prvBL.FWDataBuffer.Data, (Head.DataLen - DoneLen), 0);
  458. Check = CRC32_Cal(CRC32_Table, prvBL.FWDataBuffer.Data, (Head.DataLen - DoneLen), Check);
  459. DoneLen = Head.DataLen;
  460. }
  461. else
  462. {
  463. SPIFlash_Read(&prvSPIFlash, Head.DataStartAddress + DoneLen, prvBL.FWDataBuffer.Data, SPI_FLASH_BLOCK_SIZE, 0);
  464. Check = CRC32_Cal(CRC32_Table, prvBL.FWDataBuffer.Data, SPI_FLASH_BLOCK_SIZE, Check);
  465. DoneLen += SPI_FLASH_BLOCK_SIZE;
  466. }
  467. }
  468. if (Check != Head.DataCRC32)
  469. {
  470. DBG_INFO("ota file CRC32: %x,%x", Check, Head.DataCRC32);
  471. goto OTA_END;
  472. }
  473. break;
  474. default:
  475. DBG_INFO("core ota storage mode %u not support", uPV.u8[1]);
  476. return;
  477. break;
  478. }
  479. switch(uPV.u8[0])
  480. {
  481. case CORE_OTA_MODE_FULL:
  482. goto OTA_FULL;
  483. break;
  484. default:
  485. DBG_INFO("core ota mode %u not support", uPV.u8[0]);
  486. return;
  487. break;
  488. }
  489. goto OTA_END;
  490. OTA_FULL:
  491. DoneLen = 0;
  492. while(DoneLen < Head.DataLen)
  493. {
  494. ReadBuffer.Pos = ((Head.DataLen - DoneLen) > ReadBuffer.MaxLen)?ReadBuffer.MaxLen:(Head.DataLen - DoneLen);
  495. Result = pReadFunc(Head.DataStartAddress + DoneLen, &ReadBuffer);
  496. if (Result < 0)
  497. {
  498. Reboot = 1;
  499. DBG_INFO("core ota read data fail");
  500. goto OTA_END;
  501. }
  502. if (memcmp(__FLASH_APP_START_ADDR__ + DoneLen, ReadBuffer.Data, ReadBuffer.Pos))
  503. {
  504. DBG_INFO("ota %x", __FLASH_APP_START_ADDR__ + DoneLen);
  505. BL_OTAErase(__FLASH_APP_START_ADDR__ + DoneLen, ReadBuffer.Pos);
  506. BL_OTAWrite(__FLASH_APP_START_ADDR__ + DoneLen, ReadBuffer.Data, ReadBuffer.Pos);
  507. CACHE_CleanAll(CACHE);
  508. WDT_Feed();
  509. }
  510. DoneLen += ReadBuffer.Pos;
  511. }
  512. Check = CRC32_Cal(CRC32_Table, __FLASH_APP_START_ADDR__, Head.DataLen, 0xffffffff);
  513. if (Head.DataCRC32 != Check)
  514. {
  515. Reboot = 1;
  516. DBG_INFO("core ota final check crc32 fail %x %x", Check, Head.DataCRC32);
  517. goto OTA_END;
  518. }
  519. goto OTA_END;
  520. OTA_DIFF:
  521. goto OTA_END;
  522. OTA_END:
  523. if (Reboot)
  524. {
  525. NVIC_SystemReset();
  526. while(1){;}
  527. }
  528. else
  529. {
  530. BL_EraseSector(__FLASH_OTA_INFO_ADDR__);
  531. }
  532. }
  533. void SystemInit(void)
  534. {
  535. SYSCTRL->LDO25_CR = (1 << 5);
  536. SCB->VTOR = (uint32_t)(&__isr_start_address);
  537. #ifdef __USE_XTL__
  538. SYSCTRL->FREQ_SEL = 0x20000000 | SYSCTRL_FREQ_SEL_HCLK_DIV_1_2 | (1 << 13) | SYSCTRL_FREQ_SEL_CLOCK_SOURCE_EXT | SYSCTRL_FREQ_SEL_XTAL_192Mhz;
  539. #else
  540. SYSCTRL->FREQ_SEL = 0x20000000 | SYSCTRL_FREQ_SEL_HCLK_DIV_1_2 | (1 << 13) | SYSCTRL_FREQ_SEL_CLOCK_SOURCE_INC | SYSCTRL_FREQ_SEL_XTAL_192Mhz;
  541. #endif
  542. WDT_SetTimeout(__WDT_TO_MS__);
  543. WDT_ModeConfig(WDT_Mode_Interrupt);
  544. WDT_Enable();
  545. // QSPI->DEVICE_PARA = (QSPI->DEVICE_PARA & 0xFFFF) | (68 << 16);
  546. #if (__FPU_PRESENT) && (__FPU_USED == 1)
  547. SCB->CPACR |= ((3UL << 10 * 2) | (3UL << 11*2));
  548. #endif
  549. SYSCTRL->CG_CTRL1 = SYSCTRL_APBPeriph_UART0|SYSCTRL_APBPeriph_GPIO|SYSCTRL_APBPeriph_TIMM0;
  550. SYSCTRL->CG_CTRL2 = SYSCTRL_AHBPeriph_DMA|SYSCTRL_AHBPeriph_USB;
  551. SYSCTRL->LOCK_R &= ~SYSCTRL_USB_RESET;
  552. SYSCTRL->SOFT_RST2 |= SYSCTRL_USB_RESET;
  553. QSPI->DEVICE_PARA = (QSPI->DEVICE_PARA & 0x0000fff0) | (16 << 16) |(0x0a);
  554. // QSPI_Init(NULL);
  555. // QSPI_SetLatency(0);
  556. }
  557. void SystemCoreClockUpdate (void) /* Get Core Clock Frequency */
  558. {
  559. SystemCoreClock = HSE_VALUE * (((SYSCTRL->FREQ_SEL & SYSCTRL_FREQ_SEL_XTAL_Mask) >> SYSCTRL_FREQ_SEL_XTAL_Pos) + 1);
  560. }
  561. int main(void)
  562. {
  563. uint32_t AppInfo[4];
  564. uint32_t prvHeapLen;
  565. prvHeapLen = (uint32_t)(&__ram_end) - (uint32_t)(&__os_heap_start);
  566. bpool((uint32_t)(&__os_heap_start), prvHeapLen);
  567. CRC32_CreateTable(CRC32_Table, CRC32_GEN);
  568. __NVIC_SetPriorityGrouping(7 - __NVIC_PRIO_BITS);//对于freeRTOS必须这样配置
  569. SystemCoreClockUpdate();
  570. CoreTick_Init();
  571. cm_backtrace_init(NULL, NULL, NULL);
  572. Uart_GlobalInit();
  573. DMA_GlobalInit();
  574. DBG_Init(0);
  575. FileSystem_Init();
  576. OS_InitBuffer(&prvBL.FWDataBuffer, SPI_FLASH_BLOCK_SIZE);
  577. LOCAL_UPGRADE_START:
  578. Local_Upgrade();
  579. Uart_BaseInit(DBG_UART_ID, DBG_UART_BR, 0, UART_DATA_BIT8, UART_PARITY_NONE, UART_STOP_BIT1, NULL);
  580. #ifndef __RAMRUN__
  581. Remote_Upgrade();
  582. // __disable_irq();
  583. BL_LockFlash();
  584. memcpy(AppInfo, __FLASH_APP_START_ADDR__, sizeof(AppInfo));
  585. if (__APP_START_MAGIC__ == AppInfo[0])
  586. {
  587. #ifdef __DEBUG__
  588. DBG_INFO("bootloader build debug %s %s %x!", __DATE__, __TIME__, QSPI->DEVICE_PARA);
  589. #else
  590. DBG_INFO("bootloader build release %s %s!", __DATE__, __TIME__, QSPI->DEVICE_PARA);
  591. #endif
  592. Jump_AppRun(__FLASH_APP_START_ADDR__ + AppInfo[1]);
  593. }
  594. else
  595. {
  596. goto LOCAL_UPGRADE_START;
  597. }
  598. // i = i / j; //只是测试一下backtrace功能
  599. #endif
  600. NVIC_SystemReset();
  601. }