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@@ -1,273 +1,294 @@
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- .syntax unified
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- .cpu cortex-m4
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- .fpu softvfp
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- .thumb
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-
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-.global g_pfnVectors
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-.global HardFault_Handler
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-/* start address for the initialization values of the .data section.
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-defined in linker script */
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-.word _sidata
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-/* start address for the .data section. defined in linker script */
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-.word _sdata
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-/* end address for the .data section. defined in linker script */
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-.word _edata
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-/* start address for the .bss section. defined in linker script */
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-.word _sbss
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-/* end address for the .bss section. defined in linker script */
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-.word _ebss
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-/* stack used for SystemInit_ExtMemCtl; always internal RAM used */
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-
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-/**
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- * @brief This is the code that gets called when the processor first
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- * starts execution following a reset event. Only the absolutely
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- * necessary set is performed, after which the application
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- * supplied main() routine is called.
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- * @param None
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- * @retval : None
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-*/
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-
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- .section .text.Reset_Handler
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- .weak Reset_Handler
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- .type Reset_Handler, %function
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-Reset_Handler:
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- movs r0, #0
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- movs r1, #0
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- movs r2, #0
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- movs r3, #0
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- movs r4, #0
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- movs r5, #0
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- movs r6, #0
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- movs r7, #0
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-
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- LDR R0, =g_pfnVectors
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- LDR R1, =0xE000ED08
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- STR R0,[R1]
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- ldr sp, =_estack /* set stack pointer */
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-
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-/* Copy the data segment initializers from flash to SRAM */
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- movs r1, #0
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- b LoopCopyDataInit
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-
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-CopyDataInit:
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- ldr r3, =_sidata
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- ldr r3, [r3, r1]
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- str r3, [r0, r1]
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- adds r1, r1, #4
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-
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-LoopCopyDataInit:
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- ldr r0, =_sdata
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- ldr r3, =_edata
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- adds r2, r0, r1
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- cmp r2, r3
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- bcc CopyDataInit
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- ldr r2, =_sbss
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- b LoopFillZerobss
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-/* Zero fill the bss segment. */
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-FillZerobss:
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- movs r3, #0
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- str r3, [r2], #4
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-
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-LoopFillZerobss:
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- ldr r3, = _ebss
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- cmp r2, r3
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- bcc FillZerobss
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-
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-/* Call the clock system intitialization function.*/
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- bl SystemInit
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-/* Call static constructors */
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- bl __libc_init_array /*目前看来这个没什么用，如果代码量有超可以去掉*/
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-/* Call the application's entry point.*/
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- bl main
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- bx lr
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-.size Reset_Handler, .-Reset_Handler
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-
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-/**
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- * @brief This is the code that gets called when the processor receives an
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- * unexpected interrupt. This simply enters an infinite loop, preserving
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- * the system state for examination by a debugger.
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- * @param None
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- * @retval None
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-*/
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- .section .text.Default_Handler,"ax",%progbits
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-Default_Handler:
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-Infinite_Loop:
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- b Infinite_Loop
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- .size Default_Handler, .-Default_Handler
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-/******************************************************************************
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-*
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-* The minimal vector table for a Cortex M3. Note that the proper constructs
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-* must be placed on this to ensure that it ends up at physical address
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-* 0x0000.0000.
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-*
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-*******************************************************************************/
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- .section .isr_vector,"a",%progbits
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- .type g_pfnVectors, %object
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- .size g_pfnVectors, .-g_pfnVectors
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-
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-
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-g_pfnVectors:
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- .word _estack
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- .word Reset_Handler
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- .word NMI_Handler
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- .word HardFault_Handler
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- .word MemManage_Handler
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- .word BusFault_Handler
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- .word UsageFault_Handler
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- .word 0
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- .word 0
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- .word 0
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- .word 0
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- .word SVC_Handler
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- .word DebugMon_Handler
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- .word 0
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- .word PendSV_Handler
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- .word SysTick_Handler
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-
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- /* External Interrupts */
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- .word ISR_GlobalHandler /* Window WatchDog */
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- .word ISR_GlobalHandler /* PVD through EXTI Line detection */
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- .word ISR_GlobalHandler /* Tamper and TimeStamps through the EXTI line */
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- .word ISR_GlobalHandler /* RTC Wakeup through the EXTI line */
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- .word ISR_GlobalHandler /* FLASH */
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- .word ISR_GlobalHandler /* RCC */
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- .word ISR_GlobalHandler /* EXTI Line0 */
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- .word ISR_GlobalHandler /* EXTI Line1 */
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- .word ISR_GlobalHandler /* EXTI Line2 */
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- .word ISR_GlobalHandler /* EXTI Line3 */
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- .word ISR_GlobalHandler /* EXTI Line4 */
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- .word ISR_GlobalHandler /* DMA1 Stream 0 */
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- .word ISR_GlobalHandler /* DMA1 Stream 1 */
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- .word ISR_GlobalHandler /* DMA1 Stream 2 */
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- .word ISR_GlobalHandler /* DMA1 Stream 3 */
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- .word ISR_GlobalHandler /* DMA1 Stream 4 */
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- .word ISR_GlobalHandler /* DMA1 Stream 5 */
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- .word ISR_GlobalHandler /* DMA1 Stream 6 */
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- .word ISR_GlobalHandler /* ADC1, ADC2 and ADC3s */
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- .word ISR_GlobalHandler /* CAN1 TX */
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- .word ISR_GlobalHandler /* CAN1 RX0 */
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- .word ISR_GlobalHandler /* CAN1 RX1 */
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- .word ISR_GlobalHandler /* CAN1 SCE */
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- .word ISR_GlobalHandler /* External Line[9:5]s */
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- .word ISR_GlobalHandler /* TIM1 Break and TIM9 */
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- .word ISR_GlobalHandler /* TIM1 Update and TIM10 */
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- .word ISR_GlobalHandler /* TIM1 Trigger and Commutation and TIM11 */
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- .word ISR_GlobalHandler /* TIM1 Capture Compare */
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- .word ISR_GlobalHandler /* TIM2 */
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- .word ISR_GlobalHandler /* TIM3 */
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- .word ISR_GlobalHandler /* TIM4 */
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- .word ISR_GlobalHandler /* I2C1 Event */
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- .word ISR_GlobalHandler /* I2C1 Error */
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- .word ISR_GlobalHandler /* I2C2 Event */
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- .word ISR_GlobalHandler /* I2C2 Error */
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- .word ISR_GlobalHandler /* SPI1 */
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- .word ISR_GlobalHandler /* SPI2 */
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- .word ISR_GlobalHandler /* USART1 */
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- .word ISR_GlobalHandler /* USART2 */
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- .word ISR_GlobalHandler /* USART3 */
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- .word ISR_GlobalHandler /* External Line[15:10]s */
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- .word ISR_GlobalHandler /* RTC Alarm (A and B) through EXTI Line */
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- .word ISR_GlobalHandler /* USB OTG FS Wakeup through EXTI line */
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- .word ISR_GlobalHandler /* TIM8 Break and TIM12 */
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- .word ISR_GlobalHandler /* TIM8 Update and TIM13 */
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- .word ISR_GlobalHandler /* TIM8 Trigger and Commutation and TIM14 */
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- .word ISR_GlobalHandler /* TIM8 Capture Compare */
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- .word ISR_GlobalHandler /* DMA1 Stream7 */
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- .word ISR_GlobalHandler /* FSMC */
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- .word ISR_GlobalHandler /* SDIO */
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- .word ISR_GlobalHandler /* TIM5 */
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- .word ISR_GlobalHandler /* SPI3 */
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- .word ISR_GlobalHandler /* UART4 */
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- .word ISR_GlobalHandler /* UART5 */
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- .word ISR_GlobalHandler /* TIM6 and DAC1&2 underrun errors */
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- .word ISR_GlobalHandler /* TIM7 */
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- .word ISR_GlobalHandler /* DMA2 Stream 0 */
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- .word ISR_GlobalHandler /* DMA2 Stream 1 */
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- .word ISR_GlobalHandler /* DMA2 Stream 2 */
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- .word ISR_GlobalHandler /* DMA2 Stream 3 */
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- .word ISR_GlobalHandler /* DMA2 Stream 4 */
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- .word ISR_GlobalHandler /* Ethernet */
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- .word ISR_GlobalHandler /* Ethernet Wakeup through EXTI line */
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- .word ISR_GlobalHandler /* CAN2 TX */
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- .word ISR_GlobalHandler /* CAN2 RX0 */
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- .word ISR_GlobalHandler /* CAN2 RX1 */
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- .word ISR_GlobalHandler /* CAN2 SCE */
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- .word ISR_GlobalHandler /* USB OTG FS */
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- .word ISR_GlobalHandler /* DMA2 Stream 5 */
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- .word ISR_GlobalHandler /* DMA2 Stream 6 */
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- .word ISR_GlobalHandler /* DMA2 Stream 7 */
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- .word ISR_GlobalHandler /* USART6 */
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- .word ISR_GlobalHandler /* I2C3 event */
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- .word ISR_GlobalHandler /* I2C3 error */
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- .word ISR_GlobalHandler /* USB OTG HS End Point 1 Out */
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- .word ISR_GlobalHandler /* USB OTG HS End Point 1 In */
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- .word ISR_GlobalHandler /* USB OTG HS Wakeup through EXTI */
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- .word ISR_GlobalHandler /* USB OTG HS */
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- .word ISR_GlobalHandler /* DCMI */
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- .word ISR_GlobalHandler /* CRYP crypto */
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- .word ISR_GlobalHandler /* Hash and Rng */
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- .word ISR_GlobalHandler /* FPU */
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- .word ISR_GlobalHandler /* UART7 */
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- .word ISR_GlobalHandler /* UART8 */
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- .word ISR_GlobalHandler /* SPI4 */
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- .word ISR_GlobalHandler /* SPI5 */
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- .word ISR_GlobalHandler /* SPI6 */
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- .word ISR_GlobalHandler /* SAI1 */
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- .word ISR_GlobalHandler /* LTDC_IRQHandler */
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- .word ISR_GlobalHandler /* LTDC_ER_IRQHandler */
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- .word ISR_GlobalHandler /* DMA2D
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-
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-/*******************************************************************************
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-*
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-* Provide weak aliases for each Exception handler to the Default_Handler.
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-* As they are weak aliases, any function with the same name will override
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-* this definition.
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-*
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-*******************************************************************************/
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- .weak NMI_Handler
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- .thumb_set NMI_Handler,Default_Handler
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-
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-
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-
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- .section .text.CmTrace_Handler
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- .type CmTrace_Handler, %function
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-CmTrace_Handler:
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- MOV r0, lr /* get lr */
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- MOV r1, sp /* get stack pointer (current is MSP) */
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- BL cm_backtrace_fault
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-Fault_Loop:
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- BL Fault_Loop /* while(1) */
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-
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- .weak NMI_Handler
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- .thumb_set NMI_Handler,CmTrace_Handler
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-
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- .weak HardFault_Handler
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- .thumb_set HardFault_Handler,CmTrace_Handler
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-
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- .weak MemManage_Handler
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- .thumb_set MemManage_Handler,CmTrace_Handler
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-
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- .weak BusFault_Handler
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- .thumb_set BusFault_Handler,CmTrace_Handler
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-
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- .weak UsageFault_Handler
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- .thumb_set UsageFault_Handler,CmTrace_Handler
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-
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- .weak SVC_Handler
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- .thumb_set SVC_Handler,Default_Handler
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-
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- .weak DebugMon_Handler
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- .thumb_set DebugMon_Handler,Default_Handler
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-
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- .weak PendSV_Handler
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- .thumb_set PendSV_Handler,Default_Handler
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-
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- .weak SysTick_Handler
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- .thumb_set SysTick_Handler,Default_Handler
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-
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- .weak ISR_GlobalHandler
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- .thumb_set ISR_GlobalHandler,Default_Handler
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-
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-
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-
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-/************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/
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+/*
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+ * Copyright (c) 2022 OpenLuat & AirM2M
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+ *
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+ * Permission is hereby granted, free of charge, to any person obtaining a copy of
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+ * this software and associated documentation files (the "Software"), to deal in
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+ * the Software without restriction, including without limitation the rights to
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+ * use, copy, modify, merge, publish, distribute, sublicense, and/or sell copies of
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+ * the Software, and to permit persons to whom the Software is furnished to do so,
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+ * subject to the following conditions:
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+ *
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+ * The above copyright notice and this permission notice shall be included in all
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+ * copies or substantial portions of the Software.
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+ *
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+ * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
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+ * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, FITNESS
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+ * FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR
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+ * COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER
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+ * IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN
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+ * CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
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+ */
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+
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+ .syntax unified
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+ .cpu cortex-m4
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+ .fpu softvfp
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+ .thumb
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+
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+.global g_pfnVectors
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+.global HardFault_Handler
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+/* start address for the initialization values of the .data section.
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+defined in linker script */
|
|
|
|
|
+.word _sidata
|
|
|
|
|
+/* start address for the .data section. defined in linker script */
|
|
|
|
|
+.word _sdata
|
|
|
|
|
+/* end address for the .data section. defined in linker script */
|
|
|
|
|
+.word _edata
|
|
|
|
|
+/* start address for the .bss section. defined in linker script */
|
|
|
|
|
+.word _sbss
|
|
|
|
|
+/* end address for the .bss section. defined in linker script */
|
|
|
|
|
+.word _ebss
|
|
|
|
|
+/* stack used for SystemInit_ExtMemCtl; always internal RAM used */
|
|
|
|
|
+
|
|
|
|
|
+/**
|
|
|
|
|
+ * @brief This is the code that gets called when the processor first
|
|
|
|
|
+ * starts execution following a reset event. Only the absolutely
|
|
|
|
|
+ * necessary set is performed, after which the application
|
|
|
|
|
+ * supplied main() routine is called.
|
|
|
|
|
+ * @param None
|
|
|
|
|
+ * @retval : None
|
|
|
|
|
+*/
|
|
|
|
|
+
|
|
|
|
|
+ .section .text.Reset_Handler
|
|
|
|
|
+ .weak Reset_Handler
|
|
|
|
|
+ .type Reset_Handler, %function
|
|
|
|
|
+Reset_Handler:
|
|
|
|
|
+ movs r0, #0
|
|
|
|
|
+ movs r1, #0
|
|
|
|
|
+ movs r2, #0
|
|
|
|
|
+ movs r3, #0
|
|
|
|
|
+ movs r4, #0
|
|
|
|
|
+ movs r5, #0
|
|
|
|
|
+ movs r6, #0
|
|
|
|
|
+ movs r7, #0
|
|
|
|
|
+
|
|
|
|
|
+ LDR R0, =g_pfnVectors
|
|
|
|
|
+ LDR R1, =0xE000ED08
|
|
|
|
|
+ STR R0,[R1]
|
|
|
|
|
+ ldr sp, =_estack /* set stack pointer */
|
|
|
|
|
+
|
|
|
|
|
+/* Copy the data segment initializers from flash to SRAM */
|
|
|
|
|
+ movs r1, #0
|
|
|
|
|
+ b LoopCopyDataInit
|
|
|
|
|
+
|
|
|
|
|
+CopyDataInit:
|
|
|
|
|
+ ldr r3, =_sidata
|
|
|
|
|
+ ldr r3, [r3, r1]
|
|
|
|
|
+ str r3, [r0, r1]
|
|
|
|
|
+ adds r1, r1, #4
|
|
|
|
|
+
|
|
|
|
|
+LoopCopyDataInit:
|
|
|
|
|
+ ldr r0, =_sdata
|
|
|
|
|
+ ldr r3, =_edata
|
|
|
|
|
+ adds r2, r0, r1
|
|
|
|
|
+ cmp r2, r3
|
|
|
|
|
+ bcc CopyDataInit
|
|
|
|
|
+ ldr r2, =_sbss
|
|
|
|
|
+ b LoopFillZerobss
|
|
|
|
|
+/* Zero fill the bss segment. */
|
|
|
|
|
+FillZerobss:
|
|
|
|
|
+ movs r3, #0
|
|
|
|
|
+ str r3, [r2], #4
|
|
|
|
|
+
|
|
|
|
|
+LoopFillZerobss:
|
|
|
|
|
+ ldr r3, = _ebss
|
|
|
|
|
+ cmp r2, r3
|
|
|
|
|
+ bcc FillZerobss
|
|
|
|
|
+
|
|
|
|
|
+/* Call the clock system intitialization function.*/
|
|
|
|
|
+ bl SystemInit
|
|
|
|
|
+/* Call static constructors */
|
|
|
|
|
+ bl __libc_init_array /*目前看来这个没什么用，如果代码量有超可以去掉*/
|
|
|
|
|
+/* Call the application's entry point.*/
|
|
|
|
|
+ bl main
|
|
|
|
|
+ bx lr
|
|
|
|
|
+.size Reset_Handler, .-Reset_Handler
|
|
|
|
|
+
|
|
|
|
|
+/**
|
|
|
|
|
+ * @brief This is the code that gets called when the processor receives an
|
|
|
|
|
+ * unexpected interrupt. This simply enters an infinite loop, preserving
|
|
|
|
|
+ * the system state for examination by a debugger.
|
|
|
|
|
+ * @param None
|
|
|
|
|
+ * @retval None
|
|
|
|
|
+*/
|
|
|
|
|
+ .section .text.Default_Handler,"ax",%progbits
|
|
|
|
|
+Default_Handler:
|
|
|
|
|
+Infinite_Loop:
|
|
|
|
|
+ b Infinite_Loop
|
|
|
|
|
+ .size Default_Handler, .-Default_Handler
|
|
|
|
|
+/******************************************************************************
|
|
|
|
|
+*
|
|
|
|
|
+* The minimal vector table for a Cortex M3. Note that the proper constructs
|
|
|
|
|
+* must be placed on this to ensure that it ends up at physical address
|
|
|
|
|
+* 0x0000.0000.
|
|
|
|
|
+*
|
|
|
|
|
+*******************************************************************************/
|
|
|
|
|
+ .section .isr_vector,"a",%progbits
|
|
|
|
|
+ .type g_pfnVectors, %object
|
|
|
|
|
+ .size g_pfnVectors, .-g_pfnVectors
|
|
|
|
|
+
|
|
|
|
|
+
|
|
|
|
|
+g_pfnVectors:
|
|
|
|
|
+ .word _estack
|
|
|
|
|
+ .word Reset_Handler
|
|
|
|
|
+ .word NMI_Handler
|
|
|
|
|
+ .word HardFault_Handler
|
|
|
|
|
+ .word MemManage_Handler
|
|
|
|
|
+ .word BusFault_Handler
|
|
|
|
|
+ .word UsageFault_Handler
|
|
|
|
|
+ .word 0
|
|
|
|
|
+ .word 0
|
|
|
|
|
+ .word 0
|
|
|
|
|
+ .word 0
|
|
|
|
|
+ .word SVC_Handler
|
|
|
|
|
+ .word DebugMon_Handler
|
|
|
|
|
+ .word 0
|
|
|
|
|
+ .word PendSV_Handler
|
|
|
|
|
+ .word SysTick_Handler
|
|
|
|
|
+
|
|
|
|
|
+ /* External Interrupts */
|
|
|
|
|
+ .word ISR_GlobalHandler /* Window WatchDog */
|
|
|
|
|
+ .word ISR_GlobalHandler /* PVD through EXTI Line detection */
|
|
|
|
|
+ .word ISR_GlobalHandler /* Tamper and TimeStamps through the EXTI line */
|
|
|
|
|
+ .word ISR_GlobalHandler /* RTC Wakeup through the EXTI line */
|
|
|
|
|
+ .word ISR_GlobalHandler /* FLASH */
|
|
|
|
|
+ .word ISR_GlobalHandler /* RCC */
|
|
|
|
|
+ .word ISR_GlobalHandler /* EXTI Line0 */
|
|
|
|
|
+ .word ISR_GlobalHandler /* EXTI Line1 */
|
|
|
|
|
+ .word ISR_GlobalHandler /* EXTI Line2 */
|
|
|
|
|
+ .word ISR_GlobalHandler /* EXTI Line3 */
|
|
|
|
|
+ .word ISR_GlobalHandler /* EXTI Line4 */
|
|
|
|
|
+ .word ISR_GlobalHandler /* DMA1 Stream 0 */
|
|
|
|
|
+ .word ISR_GlobalHandler /* DMA1 Stream 1 */
|
|
|
|
|
+ .word ISR_GlobalHandler /* DMA1 Stream 2 */
|
|
|
|
|
+ .word ISR_GlobalHandler /* DMA1 Stream 3 */
|
|
|
|
|
+ .word ISR_GlobalHandler /* DMA1 Stream 4 */
|
|
|
|
|
+ .word ISR_GlobalHandler /* DMA1 Stream 5 */
|
|
|
|
|
+ .word ISR_GlobalHandler /* DMA1 Stream 6 */
|
|
|
|
|
+ .word ISR_GlobalHandler /* ADC1, ADC2 and ADC3s */
|
|
|
|
|
+ .word ISR_GlobalHandler /* CAN1 TX */
|
|
|
|
|
+ .word ISR_GlobalHandler /* CAN1 RX0 */
|
|
|
|
|
+ .word ISR_GlobalHandler /* CAN1 RX1 */
|
|
|
|
|
+ .word ISR_GlobalHandler /* CAN1 SCE */
|
|
|
|
|
+ .word ISR_GlobalHandler /* External Line[9:5]s */
|
|
|
|
|
+ .word ISR_GlobalHandler /* TIM1 Break and TIM9 */
|
|
|
|
|
+ .word ISR_GlobalHandler /* TIM1 Update and TIM10 */
|
|
|
|
|
+ .word ISR_GlobalHandler /* TIM1 Trigger and Commutation and TIM11 */
|
|
|
|
|
+ .word ISR_GlobalHandler /* TIM1 Capture Compare */
|
|
|
|
|
+ .word ISR_GlobalHandler /* TIM2 */
|
|
|
|
|
+ .word ISR_GlobalHandler /* TIM3 */
|
|
|
|
|
+ .word ISR_GlobalHandler /* TIM4 */
|
|
|
|
|
+ .word ISR_GlobalHandler /* I2C1 Event */
|
|
|
|
|
+ .word ISR_GlobalHandler /* I2C1 Error */
|
|
|
|
|
+ .word ISR_GlobalHandler /* I2C2 Event */
|
|
|
|
|
+ .word ISR_GlobalHandler /* I2C2 Error */
|
|
|
|
|
+ .word ISR_GlobalHandler /* SPI1 */
|
|
|
|
|
+ .word ISR_GlobalHandler /* SPI2 */
|
|
|
|
|
+ .word ISR_GlobalHandler /* USART1 */
|
|
|
|
|
+ .word ISR_GlobalHandler /* USART2 */
|
|
|
|
|
+ .word ISR_GlobalHandler /* USART3 */
|
|
|
|
|
+ .word ISR_GlobalHandler /* External Line[15:10]s */
|
|
|
|
|
+ .word ISR_GlobalHandler /* RTC Alarm (A and B) through EXTI Line */
|
|
|
|
|
+ .word ISR_GlobalHandler /* USB OTG FS Wakeup through EXTI line */
|
|
|
|
|
+ .word ISR_GlobalHandler /* TIM8 Break and TIM12 */
|
|
|
|
|
+ .word ISR_GlobalHandler /* TIM8 Update and TIM13 */
|
|
|
|
|
+ .word ISR_GlobalHandler /* TIM8 Trigger and Commutation and TIM14 */
|
|
|
|
|
+ .word ISR_GlobalHandler /* TIM8 Capture Compare */
|
|
|
|
|
+ .word ISR_GlobalHandler /* DMA1 Stream7 */
|
|
|
|
|
+ .word ISR_GlobalHandler /* FSMC */
|
|
|
|
|
+ .word ISR_GlobalHandler /* SDIO */
|
|
|
|
|
+ .word ISR_GlobalHandler /* TIM5 */
|
|
|
|
|
+ .word ISR_GlobalHandler /* SPI3 */
|
|
|
|
|
+ .word ISR_GlobalHandler /* UART4 */
|
|
|
|
|
+ .word ISR_GlobalHandler /* UART5 */
|
|
|
|
|
+ .word ISR_GlobalHandler /* TIM6 and DAC1&2 underrun errors */
|
|
|
|
|
+ .word ISR_GlobalHandler /* TIM7 */
|
|
|
|
|
+ .word ISR_GlobalHandler /* DMA2 Stream 0 */
|
|
|
|
|
+ .word ISR_GlobalHandler /* DMA2 Stream 1 */
|
|
|
|
|
+ .word ISR_GlobalHandler /* DMA2 Stream 2 */
|
|
|
|
|
+ .word ISR_GlobalHandler /* DMA2 Stream 3 */
|
|
|
|
|
+ .word ISR_GlobalHandler /* DMA2 Stream 4 */
|
|
|
|
|
+ .word ISR_GlobalHandler /* Ethernet */
|
|
|
|
|
+ .word ISR_GlobalHandler /* Ethernet Wakeup through EXTI line */
|
|
|
|
|
+ .word ISR_GlobalHandler /* CAN2 TX */
|
|
|
|
|
+ .word ISR_GlobalHandler /* CAN2 RX0 */
|
|
|
|
|
+ .word ISR_GlobalHandler /* CAN2 RX1 */
|
|
|
|
|
+ .word ISR_GlobalHandler /* CAN2 SCE */
|
|
|
|
|
+ .word ISR_GlobalHandler /* USB OTG FS */
|
|
|
|
|
+ .word ISR_GlobalHandler /* DMA2 Stream 5 */
|
|
|
|
|
+ .word ISR_GlobalHandler /* DMA2 Stream 6 */
|
|
|
|
|
+ .word ISR_GlobalHandler /* DMA2 Stream 7 */
|
|
|
|
|
+ .word ISR_GlobalHandler /* USART6 */
|
|
|
|
|
+ .word ISR_GlobalHandler /* I2C3 event */
|
|
|
|
|
+ .word ISR_GlobalHandler /* I2C3 error */
|
|
|
|
|
+ .word ISR_GlobalHandler /* USB OTG HS End Point 1 Out */
|
|
|
|
|
+ .word ISR_GlobalHandler /* USB OTG HS End Point 1 In */
|
|
|
|
|
+ .word ISR_GlobalHandler /* USB OTG HS Wakeup through EXTI */
|
|
|
|
|
+ .word ISR_GlobalHandler /* USB OTG HS */
|
|
|
|
|
+ .word ISR_GlobalHandler /* DCMI */
|
|
|
|
|
+ .word ISR_GlobalHandler /* CRYP crypto */
|
|
|
|
|
+ .word ISR_GlobalHandler /* Hash and Rng */
|
|
|
|
|
+ .word ISR_GlobalHandler /* FPU */
|
|
|
|
|
+ .word ISR_GlobalHandler /* UART7 */
|
|
|
|
|
+ .word ISR_GlobalHandler /* UART8 */
|
|
|
|
|
+ .word ISR_GlobalHandler /* SPI4 */
|
|
|
|
|
+ .word ISR_GlobalHandler /* SPI5 */
|
|
|
|
|
+ .word ISR_GlobalHandler /* SPI6 */
|
|
|
|
|
+ .word ISR_GlobalHandler /* SAI1 */
|
|
|
|
|
+ .word ISR_GlobalHandler /* LTDC_IRQHandler */
|
|
|
|
|
+ .word ISR_GlobalHandler /* LTDC_ER_IRQHandler */
|
|
|
|
|
+ .word ISR_GlobalHandler /* DMA2D
|
|
|
|
|
+
|
|
|
|
|
+/*******************************************************************************
|
|
|
|
|
+*
|
|
|
|
|
+* Provide weak aliases for each Exception handler to the Default_Handler.
|
|
|
|
|
+* As they are weak aliases, any function with the same name will override
|
|
|
|
|
+* this definition.
|
|
|
|
|
+*
|
|
|
|
|
+*******************************************************************************/
|
|
|
|
|
+ .weak NMI_Handler
|
|
|
|
|
+ .thumb_set NMI_Handler,Default_Handler
|
|
|
|
|
+
|
|
|
|
|
+
|
|
|
|
|
+
|
|
|
|
|
+ .section .text.CmTrace_Handler
|
|
|
|
|
+ .type CmTrace_Handler, %function
|
|
|
|
|
+CmTrace_Handler:
|
|
|
|
|
+ MOV r0, lr /* get lr */
|
|
|
|
|
+ MOV r1, sp /* get stack pointer (current is MSP) */
|
|
|
|
|
+ BL cm_backtrace_fault
|
|
|
|
|
+Fault_Loop:
|
|
|
|
|
+ BL Fault_Loop /* while(1) */
|
|
|
|
|
+
|
|
|
|
|
+ .weak NMI_Handler
|
|
|
|
|
+ .thumb_set NMI_Handler,CmTrace_Handler
|
|
|
|
|
+
|
|
|
|
|
+ .weak HardFault_Handler
|
|
|
|
|
+ .thumb_set HardFault_Handler,CmTrace_Handler
|
|
|
|
|
+
|
|
|
|
|
+ .weak MemManage_Handler
|
|
|
|
|
+ .thumb_set MemManage_Handler,CmTrace_Handler
|
|
|
|
|
+
|
|
|
|
|
+ .weak BusFault_Handler
|
|
|
|
|
+ .thumb_set BusFault_Handler,CmTrace_Handler
|
|
|
|
|
+
|
|
|
|
|
+ .weak UsageFault_Handler
|
|
|
|
|
+ .thumb_set UsageFault_Handler,CmTrace_Handler
|
|
|
|
|
+
|
|
|
|
|
+ .weak SVC_Handler
|
|
|
|
|
+ .thumb_set SVC_Handler,Default_Handler
|
|
|
|
|
+
|
|
|
|
|
+ .weak DebugMon_Handler
|
|
|
|
|
+ .thumb_set DebugMon_Handler,Default_Handler
|
|
|
|
|
+
|
|
|
|
|
+ .weak PendSV_Handler
|
|
|
|
|
+ .thumb_set PendSV_Handler,Default_Handler
|
|
|
|
|
+
|
|
|
|
|
+ .weak SysTick_Handler
|
|
|
|
|
+ .thumb_set SysTick_Handler,Default_Handler
|
|
|
|
|
+
|
|
|
|
|
+ .weak ISR_GlobalHandler
|
|
|
|
|
+ .thumb_set ISR_GlobalHandler,Default_Handler
|
|
|
|
|
+
|
|
|
|
|
+
|
|
|
|
|
+
|
|
|
|
|
+/************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/
|
alienwalker