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update:提高SPI对外设的兼容性

alienwalker 3 years ago
parent
commit
69162903ac
2 changed files with 31 additions and 11 deletions
  1. 9 2
      application/src/luat_spi_air105.c
  2. 22 9
      bsp/air105/hal/core_spi.c

+ 9 - 2
application/src/luat_spi_air105.c

@@ -159,8 +159,15 @@ int luat_spi_setup(luat_spi_t* spi) {
 
 
 int luat_spi_config_dma(int spi_id, uint32_t tx_channel, uint32_t rx_channel)
 int luat_spi_config_dma(int spi_id, uint32_t tx_channel, uint32_t rx_channel)
 {
 {
-	SPI_DMATxInit(spi_id, (tx_channel >= 8)?ETH_SPI_TX_DMA_STREAM:tx_channel, 0);
-	SPI_DMARxInit(spi_id, (rx_channel >= 8)?ETH_SPI_RX_DMA_STREAM:rx_channel, 0);
+	if (luat_spi[spi_id].id != HSPI_ID0) {
+		SPI_DMATxInit(luat_spi[spi_id].id, (tx_channel >= 8)?ETH_SPI_TX_DMA_STREAM:tx_channel, 0);
+		SPI_DMARxInit(luat_spi[spi_id].id, (rx_channel >= 8)?ETH_SPI_RX_DMA_STREAM:rx_channel, 0);
+	}
+//	else
+//	{
+//		SPI_DMATxInit(luat_spi[spi_id].id, (tx_channel >= 8)?LCD_SPI_TX_DMA_STREAM:tx_channel, 0);
+//		SPI_DMARxInit(luat_spi[spi_id].id, (rx_channel >= 8)?LCD_SPI_RX_DMA_STREAM:rx_channel, 0);
+//	}
 }
 }
 
 
 //关闭SPI,成功返回0
 //关闭SPI,成功返回0

+ 22 - 9
bsp/air105/hal/core_spi.c

@@ -54,8 +54,8 @@
 
 
 #define HSPIM_SR_PUSH_FULL_TX								(1 << 4)
 #define HSPIM_SR_PUSH_FULL_TX								(1 << 4)
 #define HSPIM_SR_POP_EMPTY_RX								(1 << 10)
 #define HSPIM_SR_POP_EMPTY_RX								(1 << 10)
-#define HSPIM_FIFO_TX_NUM									(64)
-#define HSPIM_FIFO_RX_NUM									(64)
+#define HSPIM_FIFO_TX_NUM									(63)
+#define HSPIM_FIFO_RX_NUM									(63)
 #define HSPIM_FIFO_LEVEL									(48)
 #define HSPIM_FIFO_LEVEL									(48)
 
 
 #define SPIM_FIFO_TX_NUM									(16)
 #define SPIM_FIFO_TX_NUM									(16)
@@ -381,7 +381,7 @@ static void HSPI_MasterInit(uint8_t SpiID, uint8_t Mode, uint32_t Speed)
 		ctrl |= (1 << HSPIM_CR0_PARAM_CPOL_POS)|(1 << HSPIM_CR0_PARAM_CPHA_POS);
 		ctrl |= (1 << HSPIM_CR0_PARAM_CPOL_POS)|(1 << HSPIM_CR0_PARAM_CPHA_POS);
 		break;
 		break;
 	}
 	}
-	SPI->CR1 = (div << HSPIM_CR1_PARAM_BAUDRATE_POS) + 1;
+	SPI->CR1 = (div << HSPIM_CR1_PARAM_BAUDRATE_POS);
 	SPI->CR0 = ctrl;
 	SPI->CR0 = ctrl;
 	SPI->DCR = 30|(1 << 7);
 	SPI->DCR = 30|(1 << 7);
 	prvSPI[SpiID].Speed = (SystemCoreClock >> 1) / div;
 	prvSPI[SpiID].Speed = (SystemCoreClock >> 1) / div;
@@ -779,8 +779,15 @@ static int32_t prvSPI_BlockTransfer(uint8_t SpiID, const uint8_t *TxData, uint8_
 
 
 int32_t SPI_BlockTransfer(uint8_t SpiID, const uint8_t *TxData, uint8_t *RxData, uint32_t Len)
 int32_t SPI_BlockTransfer(uint8_t SpiID, const uint8_t *TxData, uint8_t *RxData, uint32_t Len)
 {
 {
+	uint32_t times = 192000000;
+	if (prvSPI[SpiID].Speed >= 48000000)
+	{
+		times = Len * 100000;
+	}
+
 #ifdef __BUILD_OS__
 #ifdef __BUILD_OS__
-	if (  (Len <= 16) || OS_CheckInIrq() || ((prvSPI[SpiID].Speed >> 3) >= (Len * 100000)))
+	//if ( OS_CheckInIrq() || ((prvSPI[SpiID].Speed >> 3) >= (Len * 50000 * ((SpiID==HSPI_ID0)?2:1))))
+	if ( OS_CheckInIrq() || ((prvSPI[SpiID].Speed >> 3) >= times))
 	{
 	{
 		prvSPI[SpiID].IsBlockMode = 0;
 		prvSPI[SpiID].IsBlockMode = 0;
 #endif
 #endif
@@ -813,9 +820,9 @@ int32_t SPI_BlockTransfer(uint8_t SpiID, const uint8_t *TxData, uint8_t *RxData,
 		DBG("!");
 		DBG("!");
 		return Result;
 		return Result;
 	}
 	}
-	if (OS_MutexLockWtihTime(prvSPI[SpiID].Sem, Time + 10))
+	if (OS_MutexLockWtihTime(prvSPI[SpiID].Sem, Time + 20))
 	{
 	{
-		DBG("!!!");
+		DBG("spi id %d timeout",SpiID);
 		SPI_TransferStop(SpiID);
 		SPI_TransferStop(SpiID);
 		prvSPI[SpiID].IsBlockMode = 0;
 		prvSPI[SpiID].IsBlockMode = 0;
 		return -1;
 		return -1;
@@ -961,8 +968,14 @@ static int32_t prvSPI_FlashBlockTransfer(uint8_t SpiID, const uint8_t *TxData, u
 
 
 int32_t SPI_FlashBlockTransfer(uint8_t SpiID, const uint8_t *TxData, uint32_t WLen, uint8_t *RxData, uint32_t RLen)
 int32_t SPI_FlashBlockTransfer(uint8_t SpiID, const uint8_t *TxData, uint32_t WLen, uint8_t *RxData, uint32_t RLen)
 {
 {
+	uint32_t times = 192000000;
+	if (prvSPI[SpiID].Speed >= 48000000)
+	{
+		times = (WLen + RLen) * 100000;
+	}
 #ifdef __BUILD_OS__
 #ifdef __BUILD_OS__
-	if ( (prvSPI[SpiID].DMARxStream == 0xff) || (prvSPI[SpiID].DMATxStream == 0xff) || OS_CheckInIrq() || ((prvSPI[SpiID].Speed >> 3) >= ((WLen + RLen) * 100000)))
+//	if ( OS_CheckInIrq() || ((prvSPI[SpiID].Speed >> 3) >= ((WLen + RLen) * 50000 * ((SpiID==HSPI_ID0)?2:1) )))
+	if ( OS_CheckInIrq() || ((prvSPI[SpiID].Speed >> 3) >= times))
 	{
 	{
 		prvSPI[SpiID].IsBlockMode = 0;
 		prvSPI[SpiID].IsBlockMode = 0;
 #endif
 #endif
@@ -993,7 +1006,7 @@ int32_t SPI_FlashBlockTransfer(uint8_t SpiID, const uint8_t *TxData, uint32_t WL
 		free(Temp);
 		free(Temp);
 		return Result;
 		return Result;
 	}
 	}
-	if (OS_MutexLockWtihTime(prvSPI[SpiID].Sem, Time + 10))
+	if (OS_MutexLockWtihTime(prvSPI[SpiID].Sem, Time + 20))
 	{
 	{
 		free(Temp);
 		free(Temp);
 		DBG("!!!");
 		DBG("!!!");
@@ -1139,7 +1152,7 @@ void SPI_SetNewConfig(uint8_t SpiID, uint32_t Speed, uint8_t NewMode)
 	case HSPI_ID0:
 	case HSPI_ID0:
 		HSPI = (HSPIM_TypeDef *)prvSPI[SpiID].RegBase;
 		HSPI = (HSPIM_TypeDef *)prvSPI[SpiID].RegBase;
 		div = (SystemCoreClock / Speed) >> 1;
 		div = (SystemCoreClock / Speed) >> 1;
-		HSPI->CR1 = (div << HSPIM_CR1_PARAM_BAUDRATE_POS) + 1;
+		HSPI->CR1 = (div << HSPIM_CR1_PARAM_BAUDRATE_POS);
 		prvSPI[SpiID].Speed = (SystemCoreClock >> 1) / div;
 		prvSPI[SpiID].Speed = (SystemCoreClock >> 1) / div;
 		HSPI->CR0 &= ~((1 << HSPIM_CR0_PARAM_CPOL_POS)|(1 << HSPIM_CR0_PARAM_CPHA_POS));
 		HSPI->CR0 &= ~((1 << HSPIM_CR0_PARAM_CPOL_POS)|(1 << HSPIM_CR0_PARAM_CPHA_POS));
 		switch(NewMode)
 		switch(NewMode)