wm_adc.c 14 KB

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  1. /*****************************************************************************
  2. *
  3. * File Name : wm_adc.c
  4. *
  5. * Description: adc Driver Module
  6. *
  7. * Copyright (c) 2014 Winner Microelectronics Co., Ltd.
  8. * All rights reserved.
  9. *
  10. * Author : dave
  11. *
  12. * Date : 2014-8-15
  13. *****************************************************************************/
  14. #include <stdio.h>
  15. #include <string.h>
  16. #include <stdlib.h>
  17. #include "wm_regs.h"
  18. #include "wm_adc.h"
  19. #include "wm_dma.h"
  20. #include "wm_io.h"
  21. #include "wm_irq.h"
  22. #include "wm_mem.h"
  23. #include "wm_efuse.h"
  24. #define ATTRIBUTE_ISR __attribute__((isr))
  25. typedef struct
  26. {
  27. int poly_n;
  28. double a[3];
  29. }ST_ADC_POLYFIT_PARAM;
  30. /*f(x) = kx + b*/
  31. //#define ADC_CAL_K_POS (6)
  32. //#define ADC_CAL_B_POS (7)
  33. ST_ADC_POLYFIT_PARAM _polyfit_param = {0};
  34. extern void polyfit(int n,double x[],double y[],int poly_n,double a[]);
  35. static int adc_offset = 0;
  36. static int *adc_dma_buffer = NULL;
  37. volatile ST_ADC gst_adc;
  38. ATTRIBUTE_ISR void ADC_IRQHandler(void)
  39. {
  40. u32 adcvalue;
  41. int reg;
  42. csi_kernel_intrpt_enter();
  43. reg = tls_reg_read32(HR_SD_ADC_INT_STATUS);
  44. if(reg & ADC_INT_MASK) //ADC中断
  45. {
  46. tls_adc_clear_irq(ADC_INT_TYPE_ADC);
  47. if(gst_adc.adc_cb)
  48. {
  49. adcvalue = tls_read_adc_result();
  50. gst_adc.adc_cb((int *)&adcvalue,1);
  51. }
  52. }
  53. if(reg & CMP_INT_MASK)
  54. {
  55. tls_adc_clear_irq(ADC_INT_TYPE_ADC_COMP);
  56. if(gst_adc.adc_bigger_cb)
  57. gst_adc.adc_bigger_cb(NULL, 0);
  58. }
  59. csi_kernel_intrpt_exit();
  60. }
  61. static void adc_dma_isr_callbk(void)
  62. {
  63. if(gst_adc.adc_dma_cb)
  64. {
  65. if (adc_dma_buffer)
  66. {
  67. gst_adc.adc_dma_cb((int *)(adc_dma_buffer), gst_adc.valuelen);
  68. }
  69. }
  70. }
  71. int adc_polyfit_init(ST_ADC_POLYFIT_PARAM *polyfit_param)
  72. {
  73. FT_ADC_CAL_ST adc_st;
  74. double x[16] = {0};
  75. double y[16] = {0};
  76. int n = 4, poly_n = 1; // or = 2
  77. int i;
  78. polyfit_param->poly_n = 0;
  79. memset(&adc_st, 0, sizeof(adc_st));
  80. tls_get_adc_cal_param(&adc_st);
  81. //dumpBuffer("adc_st",(char *)&adc_st, sizeof(adc_st));
  82. n = adc_st.valid_cnt;
  83. if(n >= 4 && n <= 8)
  84. {
  85. for(i = 0; i < n; i++)
  86. {
  87. x[i] = (double)adc_st.units[i].real_val;
  88. y[i] = (double)adc_st.units[i].ref_val;
  89. }
  90. polyfit_param->poly_n = poly_n;
  91. polyfit(n,x,y,poly_n,polyfit_param->a);
  92. }
  93. return 0;
  94. }
  95. void tls_adc_init(u8 ifusedma,u8 dmachannel)
  96. {
  97. /*ADC LDO ON here, after 90ns, ADC can work to avoid ADC affect those ADC IOs that are multiplexed GPIO input to capture irq*/
  98. u32 value = 0;
  99. value = tls_reg_read32(HR_SD_ADC_ANA_CTRL);
  100. value |= CONFIG_EN_LDO_ADC_VAL(1);
  101. tls_reg_write32(HR_SD_ADC_ANA_CTRL, value);
  102. memset(&_polyfit_param, 0, sizeof(_polyfit_param));
  103. adc_polyfit_init(&_polyfit_param);
  104. tls_reg_write32(HR_SD_ADC_CTRL, ANALOG_SWITCH_TIME_VAL(0x50)|ANALOG_INIT_TIME_VAL(0x50)|ADC_IRQ_EN_VAL(0x1));
  105. tls_irq_enable(ADC_IRQn);
  106. //注册中断和channel有关,所以需要先请求
  107. if(ifusedma)
  108. {
  109. gst_adc.dmachannel = tls_dma_request(dmachannel, TLS_DMA_FLAGS_CHANNEL_SEL(TLS_DMA_SEL_SDADC_CH0 + dmachannel) |
  110. TLS_DMA_FLAGS_HARD_MODE); //请求dma,不要直接指定,因为请求的dma可能会被别的任务使用
  111. if (gst_adc.dmachannel != 0xFF)
  112. {
  113. tls_dma_irq_register(gst_adc.dmachannel, (void(*)(void*))adc_dma_isr_callbk, NULL, TLS_DMA_IRQ_TRANSFER_DONE);
  114. }
  115. }
  116. //printf("\ndma channel = %d\n",gst_adc.dmachannel);
  117. }
  118. void tls_adc_clear_irq(int inttype)
  119. {
  120. int reg;
  121. reg = tls_reg_read32(HR_SD_ADC_INT_STATUS);
  122. if(ADC_INT_TYPE_ADC == inttype)
  123. {
  124. reg |= ADC_INT_MASK;
  125. tls_reg_write32(HR_SD_ADC_INT_STATUS, reg);
  126. }
  127. else if(ADC_INT_TYPE_ADC_COMP== inttype)
  128. {
  129. reg |= CMP_INT_MASK;
  130. tls_reg_write32(HR_SD_ADC_INT_STATUS, reg);
  131. }
  132. else if(ADC_INT_TYPE_DMA == inttype)
  133. {
  134. tls_dma_irq_clr(gst_adc.dmachannel, TLS_DMA_IRQ_TRANSFER_DONE);
  135. }
  136. }
  137. void tls_adc_irq_register(int inttype, void (*callback)(int *buf, u16 len))
  138. {
  139. if(ADC_INT_TYPE_ADC == inttype)
  140. {
  141. gst_adc.adc_cb = callback;
  142. }
  143. else if(ADC_INT_TYPE_DMA == inttype)
  144. {
  145. gst_adc.adc_dma_cb = callback;
  146. }
  147. else if(ADC_INT_TYPE_ADC_COMP == inttype)
  148. {
  149. gst_adc.adc_bigger_cb = callback;
  150. }
  151. }
  152. u32 tls_read_adc_result(void)
  153. {
  154. u32 value;
  155. u32 ret;
  156. value = tls_reg_read32(HR_SD_ADC_RESULT_REG);
  157. ret = ADC_RESULT_VAL(value);
  158. return ret;
  159. }
  160. void tls_adc_start_with_cpu(int Channel)
  161. {
  162. u32 value;
  163. /* Stop adc first */
  164. value = tls_reg_read32(HR_SD_ADC_ANA_CTRL);
  165. value |= CONFIG_PD_ADC_VAL(1);
  166. value &= ~(CONFIG_RSTN_ADC_VAL(1));
  167. value &= ~(CONFIG_ADC_CHL_SEL_MASK);
  168. value |= CONFIG_ADC_CHL_SEL(Channel);
  169. tls_reg_write32(HR_SD_ADC_ANA_CTRL, value);
  170. value = tls_reg_read32(HR_SD_ADC_ANA_CTRL);
  171. value &= ~(CONFIG_PD_ADC_VAL(1));
  172. value |= (CONFIG_RSTN_ADC_VAL(1));
  173. tls_reg_write32(HR_SD_ADC_ANA_CTRL, value);
  174. }
  175. void tls_adc_start_with_dma(int Channel, int Length)
  176. {
  177. u32 value;
  178. int len;
  179. if(Channel < 0 || Channel > 11)
  180. return;
  181. if(Length > ADC_DEST_BUFFER_SIZE)
  182. len = ADC_DEST_BUFFER_SIZE;
  183. else
  184. len = Length;
  185. gst_adc.valuelen = len;
  186. if (adc_dma_buffer)
  187. {
  188. tls_mem_free(adc_dma_buffer);
  189. adc_dma_buffer = NULL;
  190. }
  191. adc_dma_buffer = tls_mem_alloc(len*4);
  192. if (adc_dma_buffer == NULL)
  193. {
  194. //wm_printf("adc dma buffer alloc failed\r\n");
  195. return;
  196. }
  197. Channel &= 0xF;
  198. /*disable adc:set adc pd, rstn and ldo disable*/
  199. value = tls_reg_read32(HR_SD_ADC_ANA_CTRL);
  200. value |= CONFIG_PD_ADC_VAL(1);
  201. value &= ~(CONFIG_RSTN_ADC_VAL(1));
  202. tls_reg_write32(HR_SD_ADC_ANA_CTRL, value);
  203. /* Stop dma if necessary */
  204. while(DMA_CHNLCTRL_REG(gst_adc.dmachannel) & 1)
  205. {
  206. DMA_CHNLCTRL_REG(gst_adc.dmachannel) = 2;
  207. }
  208. DMA_SRCADDR_REG(gst_adc.dmachannel) = HR_SD_ADC_RESULT_REG;
  209. DMA_DESTADDR_REG(gst_adc.dmachannel) = (u32)adc_dma_buffer;
  210. DMA_SRCWRAPADDR_REG(gst_adc.dmachannel) = HR_SD_ADC_RESULT_REG;
  211. DMA_DESTWRAPADDR_REG(gst_adc.dmachannel) = (u32)adc_dma_buffer;
  212. DMA_WRAPSIZE_REG(gst_adc.dmachannel) = (len*4) << 16;
  213. /* Dest_add_inc, halfword, */
  214. DMA_CTRL_REG(gst_adc.dmachannel) = (3<<3)|(2<<5)|((len*4)<<8)|(1<<0);
  215. DMA_INTMASK_REG &= ~(0x01 << (gst_adc.dmachannel *2 + 1));
  216. DMA_CHNLCTRL_REG(gst_adc.dmachannel) = 1; /* Enable dma */
  217. /*Enable dma*/
  218. value = tls_reg_read32(HR_SD_ADC_CTRL);
  219. value |= (1<<0);
  220. tls_reg_write32(HR_SD_ADC_CTRL, value);
  221. value = tls_reg_read32(HR_SD_ADC_ANA_CTRL);
  222. value &= ~(CONFIG_ADC_CHL_SEL_MASK);
  223. value |= CONFIG_ADC_CHL_SEL(Channel);
  224. value &= ~(CONFIG_PD_ADC_VAL(1));
  225. value |= (CONFIG_RSTN_ADC_VAL(1));
  226. tls_reg_write32(HR_SD_ADC_ANA_CTRL, value); /*start adc*/
  227. }
  228. void tls_adc_stop(int ifusedma)
  229. {
  230. u32 value;
  231. tls_reg_write32(HR_SD_ADC_PGA_CTRL, 0);
  232. value = tls_reg_read32(HR_SD_ADC_ANA_CTRL);
  233. value |= CONFIG_PD_ADC_VAL(1);
  234. value &= ~(CONFIG_RSTN_ADC_VAL(1)|CONFIG_EN_LDO_ADC_VAL(1));
  235. tls_reg_write32(HR_SD_ADC_ANA_CTRL, value);
  236. /*Disable dma*/
  237. value = tls_reg_read32(HR_SD_ADC_CTRL);
  238. value &= ~(1<<0);
  239. tls_reg_write32(HR_SD_ADC_CTRL, value);
  240. /*Disable compare function and compare irq*/
  241. value = tls_reg_read32(HR_SD_ADC_CTRL);
  242. value &= ~(3<<4);
  243. tls_reg_write32(HR_SD_ADC_CTRL, value);
  244. if(ifusedma)
  245. tls_dma_free(gst_adc.dmachannel);
  246. if (adc_dma_buffer)
  247. {
  248. tls_mem_free(adc_dma_buffer);
  249. adc_dma_buffer = NULL;
  250. }
  251. }
  252. void tls_adc_config_cmp_reg(int cmp_data, int cmp_pol)
  253. {
  254. u32 value;
  255. tls_reg_write32(HR_SD_ADC_CMP_VALUE, CONFIG_ADC_INPUT_CMP_VAL(cmp_data));
  256. value = tls_reg_read32(HR_SD_ADC_CTRL);
  257. if(cmp_pol)
  258. {
  259. value |= CMP_POLAR_MASK;
  260. }
  261. else
  262. {
  263. value &= ~CMP_POLAR_MASK;
  264. }
  265. tls_reg_write32(HR_SD_ADC_CTRL, value);
  266. }
  267. void tls_adc_cmp_start(int Channel, int cmp_data, int cmp_pol)
  268. {
  269. u32 value;
  270. /* Stop adc first */
  271. value = tls_reg_read32(HR_SD_ADC_ANA_CTRL);
  272. value |= CONFIG_PD_ADC_VAL(1);
  273. value &= ~(CONFIG_RSTN_ADC_VAL(1));
  274. value |= CONFIG_ADC_CHL_SEL(Channel);
  275. tls_reg_write32(HR_SD_ADC_ANA_CTRL, value);
  276. tls_adc_config_cmp_reg(cmp_data, cmp_pol);
  277. value = tls_reg_read32(HR_SD_ADC_ANA_CTRL);
  278. value &= ~(CONFIG_PD_ADC_VAL(1));
  279. value |= (CONFIG_RSTN_ADC_VAL(1));
  280. tls_reg_write32(HR_SD_ADC_ANA_CTRL, value); /*start adc*/
  281. /*Enable compare function and compare irq*/
  282. value = tls_reg_read32(HR_SD_ADC_CTRL);
  283. value |= (3<<4);
  284. tls_reg_write32(HR_SD_ADC_CTRL, value);
  285. }
  286. void tls_adc_reference_sel(int ref)
  287. {
  288. u32 value;
  289. value = tls_reg_read32(HR_SD_ADC_PGA_CTRL);
  290. if(ADC_REFERENCE_EXTERNAL == ref)
  291. {
  292. value |= BYPASS_INNER_REF_SEL;
  293. }
  294. else if(ADC_REFERENCE_INTERNAL == ref)
  295. {
  296. value &= ~BYPASS_INNER_REF_SEL;
  297. }
  298. tls_reg_write32(HR_SD_ADC_PGA_CTRL, value);
  299. }
  300. void tls_adc_set_clk(int div)
  301. {
  302. u32 value;
  303. value = tls_reg_read32(HR_CLK_SEL_CTL);
  304. value &= ~(0xFF<<8);
  305. value |= (div&0xFF)<<8;
  306. tls_reg_write32(HR_CLK_SEL_CTL, value);
  307. value = tls_reg_read32(HR_CLK_DIV_CTL);
  308. value |= (1 << 31);
  309. tls_reg_write32(HR_CLK_DIV_CTL, value);
  310. }
  311. void tls_adc_set_pga(int gain1, int gain2)
  312. {
  313. u32 val = 0;
  314. u8 gain1times = 0;
  315. u8 gain2times = 0;
  316. switch(gain1)
  317. {
  318. case 1:
  319. gain1times = 0;
  320. break;
  321. case 16:
  322. gain1times = 1;
  323. break;
  324. case 32:
  325. gain1times = 2;
  326. break;
  327. case 64:
  328. gain1times = 3;
  329. break;
  330. case 128:
  331. gain1times = 4;
  332. break;
  333. case 256:
  334. gain1times = 5;
  335. break;
  336. default:
  337. gain1times = 0;
  338. break;
  339. }
  340. switch(gain2)
  341. {
  342. case 1:
  343. gain2times = 0;
  344. break;
  345. case 2:
  346. gain2times = 1;
  347. break;
  348. case 3:
  349. gain2times = 2;
  350. break;
  351. case 4:
  352. gain2times = 3;
  353. break;
  354. default:
  355. gain2times = 0;
  356. break;
  357. }
  358. val = tls_reg_read32(HR_SD_ADC_PGA_CTRL);
  359. val = GAIN_CTRL_PGA_VAL(gain2times)|CLK_CHOP_SEL_PGA_VAL(gain1times)|PGA_BYPASS_VAL(0)|PGA_CHOP_ENP_VAL(1)|PGA_EN_VAL(1);
  360. tls_reg_write32(HR_SD_ADC_PGA_CTRL, val);
  361. }
  362. void signedToUnsignedData(int *adcValue)
  363. {
  364. if (*adcValue &0x20000)
  365. {
  366. *adcValue = *adcValue &0x1FFFF;
  367. }
  368. else
  369. {
  370. *adcValue = *adcValue |0x20000;
  371. }
  372. }
  373. static void waitForAdcDone(void)
  374. {
  375. u32 counter = 0;
  376. u32 timeout = 10000;
  377. u32 reg = 0;
  378. /*wait for transfer success*/
  379. tls_irq_disable(ADC_IRQn);
  380. while(timeout--)
  381. {
  382. reg = tls_reg_read32(HR_SD_ADC_INT_STATUS);
  383. if (reg & ADC_INT_MASK)
  384. {
  385. counter++;
  386. tls_reg_write32(HR_SD_ADC_INT_STATUS, reg|ADC_INT_MASK);
  387. if (counter == 4)
  388. {
  389. break;
  390. }
  391. }
  392. else if(reg & CMP_INT_MASK)
  393. {
  394. counter++;
  395. tls_reg_write32(HR_SD_ADC_INT_STATUS, reg|CMP_INT_MASK);
  396. if (counter == 4)
  397. {
  398. break;
  399. }
  400. }
  401. }
  402. tls_irq_enable(ADC_IRQn);
  403. }
  404. int cal_voltage(double vol)
  405. {
  406. double y1, voltage;
  407. double vol_30mV;
  408. int average = ((int)vol >> 2) & 0xFFFF;
  409. if(_polyfit_param.poly_n == 2)
  410. {
  411. y1 = _polyfit_param.a[2]*average*average + _polyfit_param.a[1]*average + _polyfit_param.a[0];
  412. }
  413. else if(_polyfit_param.poly_n == 1)
  414. {
  415. y1 = _polyfit_param.a[1]*average + _polyfit_param.a[0];
  416. vol_30mV = ((double)300.0L - _polyfit_param.a[0]) / _polyfit_param.a[1];
  417. if(average + 170 < vol_30mV)
  418. {
  419. return 0;
  420. }
  421. else if(average < vol_30mV)
  422. {
  423. y1 = 300.0L - 200.0L*(vol_30mV - average) / 170.0L;
  424. }
  425. }
  426. else
  427. {
  428. int val = 0;
  429. if (vol < 46134) {
  430. val = 0;
  431. }
  432. else if (vol > 123405) {
  433. val = 2300;
  434. }
  435. else {
  436. val = (int)((double)(vol - 46134) / (double)(32.196));
  437. }
  438. return val;
  439. // voltage = ((double)vol - (double)adc_offset)/4.0;
  440. // voltage = 1.196 + voltage*(126363/1000.0)/1000000;
  441. // y1 = voltage*10000;
  442. }
  443. return (int)(y1/10);
  444. }
  445. u32 adc_get_offset(void)
  446. {
  447. adc_offset = 0;
  448. tls_adc_init(0, 0);
  449. tls_adc_reference_sel(ADC_REFERENCE_INTERNAL);
  450. tls_adc_start_with_cpu(CONFIG_ADC_CHL_OFFSET);
  451. tls_adc_set_pga(1,1);
  452. tls_adc_set_clk(0x28);
  453. waitForAdcDone();
  454. adc_offset = tls_read_adc_result(); //获取adc转换结果
  455. signedToUnsignedData(&adc_offset);
  456. tls_adc_stop(0);
  457. //printf("adc_offset: 0x%x\r\n", adc_offset);
  458. return adc_offset;
  459. }
  460. int adc_get_interTemp(void)
  461. {
  462. return adc_temp();
  463. }
  464. int adc_get_inputVolt(u8 channel, int* origin)
  465. {
  466. int average = 0;
  467. double voltage = 0.0;
  468. if(_polyfit_param.poly_n == 0 || (channel == 8) || (channel == 9))
  469. {
  470. adc_get_offset();
  471. }
  472. tls_adc_init(0, 0);
  473. tls_adc_reference_sel(ADC_REFERENCE_INTERNAL);
  474. tls_adc_set_pga(1,1);
  475. tls_adc_set_clk(0x28);
  476. tls_adc_start_with_cpu(channel);
  477. waitForAdcDone();
  478. average = tls_read_adc_result();
  479. signedToUnsignedData(&average);
  480. *origin = average;
  481. tls_adc_stop(0);
  482. if ((channel == 8) || (channel == 9))
  483. {
  484. voltage = ((double)average - (double)adc_offset)/4.0;
  485. voltage = voltage*(126363/1000)/1000000;
  486. }
  487. else
  488. {
  489. return cal_voltage((double)average);
  490. }
  491. average = (int)(voltage*1000);
  492. return average;
  493. }
  494. u32 adc_get_interVolt(void)
  495. {
  496. u32 voltValue;
  497. u32 value = 0;
  498. //u32 code = 0;
  499. int i = 0;
  500. adc_get_offset();
  501. tls_adc_init(0, 0);
  502. tls_adc_reference_sel(ADC_REFERENCE_INTERNAL);
  503. tls_adc_set_pga(1,1);
  504. tls_adc_set_clk(0x28);
  505. tls_adc_start_with_cpu(CONFIG_ADC_CHL_VOLT);
  506. voltValue = 0;
  507. for (i = 0;i < 10; i++)
  508. {
  509. waitForAdcDone();
  510. value = tls_read_adc_result();
  511. signedToUnsignedData((int *)&value);
  512. voltValue += value;
  513. }
  514. voltValue = voltValue/10;
  515. //code = voltValue;
  516. voltValue = voltValue;
  517. adc_offset = adc_offset;
  518. tls_adc_stop(0);
  519. voltValue = ((voltValue - adc_offset)*685/20+1200000)*2;
  520. value = voltValue - voltValue*10/100;
  521. //printf("Power voltage code:0x%x, interVolt:%d(uV)---%d.%d(V)\r\n", code, value, value/1000000, (value%1000000)/1000);
  522. return value/1000;
  523. }
  524. /**
  525. * @brief This function is used to get chip's internal work temperature
  526. *
  527. * @return chip temperature, unit: 1/1000 degree
  528. *
  529. * @note Only use to get chip's internal work temperature.
  530. */
  531. int adc_temp(void)
  532. {
  533. u32 code1 = 0, code2 = 0;
  534. u32 val = 0;
  535. int temperature = 0;
  536. tls_adc_init(0, 0);
  537. tls_adc_reference_sel(ADC_REFERENCE_INTERNAL);
  538. tls_adc_set_pga(1,4);
  539. tls_adc_start_with_cpu(CONFIG_ADC_CHL_TEMP);
  540. tls_adc_set_clk(0x28);
  541. val = tls_reg_read32(HR_SD_ADC_TEMP_CTRL);
  542. val &= ~TEMP_GAIN_MASK;
  543. val |= TEMP_GAIN_VAL(0);
  544. val |= TEMP_EN_VAL(1);
  545. val &= (~(TEMP_CAL_OFFSET_MASK));
  546. tls_reg_write32(HR_SD_ADC_TEMP_CTRL, val);
  547. waitForAdcDone();
  548. code1 = tls_read_adc_result();
  549. signedToUnsignedData((int *)&code1);
  550. val |= TEMP_CAL_OFFSET_MASK;
  551. tls_reg_write32(HR_SD_ADC_TEMP_CTRL, val);
  552. waitForAdcDone();
  553. code2 = tls_read_adc_result();
  554. signedToUnsignedData((int *)&code2);
  555. val &= ~(TEMP_EN_VAL(1));
  556. tls_reg_write32(HR_SD_ADC_TEMP_CTRL, val);
  557. tls_adc_stop(0);
  558. temperature = ((int)code1 - (int)code2);
  559. temperature = ((temperature*1000/(int)(2*2*4)-4120702)*1000/15548);
  560. return temperature;
  561. }