wm_internal_fls.c 37 KB

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  1. /**
  2. * @file wm_internal_fls.c
  3. *
  4. * @brief flash Driver Module
  5. *
  6. * @author dave
  7. *
  8. * Copyright (c) 2015 Winner Microelectronics Co., Ltd.
  9. */
  10. #include <stdio.h>
  11. #include <string.h>
  12. #include <stdlib.h>
  13. #include "wm_dbg.h"
  14. #include "wm_mem.h"
  15. #include "list.h"
  16. #include "wm_regs.h"
  17. #include "wm_internal_flash.h"
  18. #include "wm_flash_map.h"
  19. static struct tls_inside_fls *inside_fls = NULL;
  20. /**System parameter, default for 2M flash*/
  21. unsigned int TLS_FLASH_PARAM_DEFAULT = (0x81FB000UL);
  22. unsigned int TLS_FLASH_PARAM1_ADDR = (0x81FC000UL);
  23. unsigned int TLS_FLASH_PARAM2_ADDR = (0x81FD000UL);
  24. unsigned int TLS_FLASH_PARAM_RESTORE_ADDR = (0x81FE000UL);
  25. unsigned int TLS_FLASH_OTA_FLAG_ADDR = (0x81FF000UL);
  26. unsigned int TLS_FLASH_END_ADDR = (0x81FFFFFUL);
  27. static vu32 read_first_value(void)
  28. {
  29. return M32(RSA_BASE_ADDRESS);
  30. }
  31. static void writeEnable(void)
  32. {
  33. M32(HR_FLASH_CMD_ADDR) = 0x6;
  34. M32(HR_FLASH_CMD_START) = CMD_START_Msk;
  35. }
  36. unsigned char readRID(void)
  37. {
  38. M32(HR_FLASH_CMD_ADDR) = 0x2c09F;
  39. M32(HR_FLASH_CMD_START) = CMD_START_Msk;
  40. return read_first_value() & 0xFF;
  41. }
  42. static void writeBpBit_for_1wreg(char cmp, char bp4, char bp3, char bp2, char bp1, char bp0)
  43. {
  44. int status = 0;
  45. int bpstatus = 0;
  46. M32(HR_FLASH_CMD_ADDR) = 0x0C005;
  47. M32(HR_FLASH_CMD_START) = CMD_START_Msk;
  48. status = read_first_value() & 0xFF;
  49. M32(HR_FLASH_CMD_ADDR) = 0x0C035;
  50. M32(HR_FLASH_CMD_START) = CMD_START_Msk;
  51. status |= (read_first_value() & 0xFF) << 8;
  52. /*Write Enable*/
  53. M32(HR_FLASH_CMD_ADDR) = 0x6;
  54. M32(HR_FLASH_CMD_START) = CMD_START_Msk;
  55. bpstatus = (bp4 << 6) | (bp3 << 5) | (bp2 << 4) | (bp1 << 3) | (bp0 << 2);
  56. status = (status & 0xBF83) | bpstatus | (cmp << 14);
  57. M32(RSA_BASE_ADDRESS) = status;
  58. M32(HR_FLASH_CMD_ADDR) = 0x1A001;
  59. M32(HR_FLASH_CMD_START) = CMD_START_Msk;
  60. }
  61. static void writeBpBit_for_2wreg(char cmp, char bp4, char bp3, char bp2, char bp1, char bp0)
  62. {
  63. int status = 0;
  64. int bpstatus = 0;
  65. M32(HR_FLASH_CMD_ADDR) = 0x0C005;
  66. M32(HR_FLASH_CMD_START) = CMD_START_Msk;
  67. status = read_first_value() & 0xFF;
  68. M32(HR_FLASH_CMD_ADDR) = 0x0C035;
  69. M32(HR_FLASH_CMD_START) = CMD_START_Msk;
  70. status |= (read_first_value() & 0xFF) << 8;
  71. /*Write Enable*/
  72. M32(HR_FLASH_CMD_ADDR) = 0x6;
  73. M32(HR_FLASH_CMD_START) = CMD_START_Msk;
  74. bpstatus = (bp4 << 6) | (bp3 << 5) | (bp2 << 4) | (bp1 << 3) | (bp0 << 2);
  75. bpstatus = (status & 0x83) | bpstatus;
  76. M32(RSA_BASE_ADDRESS) = bpstatus;
  77. M32(HR_FLASH_CMD_ADDR) = 0xA001;
  78. M32(HR_FLASH_CMD_START) = CMD_START_Msk;
  79. M32(HR_FLASH_CMD_ADDR) = 0x6;
  80. M32(HR_FLASH_CMD_START) = CMD_START_Msk;
  81. status = ((status>>8) & 0xBF) | (cmp << 6);
  82. M32(RSA_BASE_ADDRESS) = status;
  83. M32(HR_FLASH_CMD_ADDR) = 0xA031;
  84. M32(HR_FLASH_CMD_START) = CMD_START_Msk;
  85. }
  86. static void writeESMTBpBit(char cmp, char bp4, char bp3, char bp2, char bp1, char bp0)
  87. {
  88. int status = 0;
  89. int bpstatus = 0;
  90. M32(HR_FLASH_CMD_ADDR) = 0x0C005;
  91. M32(HR_FLASH_CMD_START) = CMD_START_Msk;
  92. status = read_first_value() & 0xFF;
  93. bpstatus = (bp4 << 6) | (bp3 << 5) | (bp2 << 4) | (bp1 << 3) | (bp0 << 2);
  94. status = (status & 0x83) | bpstatus;
  95. /*Write Enable*/
  96. M32(HR_FLASH_CMD_ADDR) = 0x6;
  97. M32(HR_FLASH_CMD_START) = CMD_START_Msk;
  98. bpstatus = (bp4 << 6) | (bp3 << 5) | (bp2 << 4) | (bp1 << 3) | (bp0 << 2);
  99. status = (status & 0x83) | bpstatus | (cmp << 14);
  100. M32(RSA_BASE_ADDRESS) = status;
  101. M32(HR_FLASH_CMD_ADDR) = 0x0A001;
  102. M32(HR_FLASH_CMD_START) = CMD_START_Msk;
  103. M32(HR_FLASH_CMD_ADDR) = 0x0C085;
  104. M32(HR_FLASH_CMD_START) = CMD_START_Msk;
  105. status = read_first_value() & 0xFF;
  106. /*Write Enable*/
  107. M32(HR_FLASH_CMD_ADDR) = 0x6;
  108. M32(HR_FLASH_CMD_START) = CMD_START_Msk;
  109. status = (status & 0xBF) | (cmp << 6);
  110. M32(RSA_BASE_ADDRESS) = status;
  111. M32(HR_FLASH_CMD_ADDR) = 0x0A0C1;
  112. M32(HR_FLASH_CMD_START) = CMD_START_Msk;
  113. }
  114. static int flashunlock(void)
  115. {
  116. switch(readRID())
  117. {
  118. case SPIFLASH_MID_GD:
  119. case SPIFLASH_MID_TSINGTENG:
  120. writeBpBit_for_1wreg(0, 0, 0, 0, 0, 0);
  121. break;
  122. case SPIFLASH_MID_PUYA:
  123. case SPIFLASH_MID_XTX:
  124. case SPIFLASH_MID_BOYA:
  125. case SPIFLASH_MID_FUDANMICRO:
  126. case SPIFLASH_MID_XMC:
  127. writeBpBit_for_2wreg(0, 0, 0, 0, 0, 0);
  128. break;
  129. case SPIFLASH_MID_ESMT:
  130. writeESMTBpBit(0, 0, 0, 0, 0, 0);
  131. break;
  132. default:
  133. return -1;
  134. }
  135. return 0;
  136. }
  137. static int flashlock(void)
  138. {
  139. switch(readRID())
  140. {
  141. case SPIFLASH_MID_GD:
  142. case SPIFLASH_MID_TSINGTENG:
  143. writeBpBit_for_1wreg(0, 1, 1, 0, 1, 0);
  144. break;
  145. case SPIFLASH_MID_PUYA:
  146. case SPIFLASH_MID_XTX:
  147. case SPIFLASH_MID_BOYA:
  148. case SPIFLASH_MID_FUDANMICRO:
  149. case SPIFLASH_MID_XMC:
  150. writeBpBit_for_2wreg(0, 1, 1, 0, 1, 0);
  151. break;
  152. case SPIFLASH_MID_ESMT:
  153. writeESMTBpBit(0, 1, 1, 0, 1, 0);
  154. break;
  155. default:
  156. return -1;/*do not clear QIO Mode*/
  157. }
  158. return 0;
  159. }
  160. static void writeLbBit_for_1wreg(unsigned int val)
  161. {
  162. int status = 0;
  163. M32(HR_FLASH_CMD_ADDR) = 0x0C005;
  164. M32(HR_FLASH_CMD_START) = CMD_START_Msk;
  165. status = read_first_value() & 0xFF;
  166. M32(HR_FLASH_CMD_ADDR) = 0x0C035;
  167. M32(HR_FLASH_CMD_START) = CMD_START_Msk;
  168. status |= (read_first_value() & 0xFF) << 8;
  169. /*Write Enable*/
  170. M32(HR_FLASH_CMD_ADDR) = 0x6;
  171. M32(HR_FLASH_CMD_START) = CMD_START_Msk;
  172. status |= (val);
  173. M32(RSA_BASE_ADDRESS) = status;
  174. M32(HR_FLASH_CMD_ADDR) = 0x1A001;
  175. M32(HR_FLASH_CMD_START) = CMD_START_Msk;
  176. }
  177. static void writeLbBit_for_2wreg(unsigned int val)
  178. {
  179. int status = 0;
  180. M32(HR_FLASH_CMD_ADDR) = 0x0C005;
  181. M32(HR_FLASH_CMD_START) = CMD_START_Msk;
  182. status = read_first_value() & 0xFF;
  183. M32(HR_FLASH_CMD_ADDR) = 0x0C035;
  184. M32(HR_FLASH_CMD_START) = CMD_START_Msk;
  185. status |= (read_first_value() & 0xFF) << 8;
  186. /*Write Enable*/
  187. M32(HR_FLASH_CMD_ADDR) = 0x6;
  188. M32(HR_FLASH_CMD_START) = CMD_START_Msk;
  189. status |= (val);
  190. status = (status>>8);
  191. M32(RSA_BASE_ADDRESS) = status;
  192. M32(HR_FLASH_CMD_ADDR) = 0xA031;
  193. M32(HR_FLASH_CMD_START) = CMD_START_Msk;
  194. }
  195. static int programSR(unsigned int cmd, unsigned long addr, unsigned char *buf, unsigned int sz)
  196. {
  197. unsigned long base_addr = 0;
  198. unsigned int size = 0;
  199. if (sz > INSIDE_FLS_PAGE_SIZE)
  200. {
  201. sz = INSIDE_FLS_PAGE_SIZE;
  202. }
  203. base_addr = RSA_BASE_ADDRESS;
  204. size = sz;
  205. while(size)
  206. {
  207. M32(base_addr) = *((unsigned long *)buf);
  208. base_addr += 4;
  209. buf += 4;
  210. size -= 4;
  211. }
  212. writeEnable();
  213. M32(HR_FLASH_CMD_ADDR) = cmd | ((sz - 1) << 16);
  214. M32(HR_FLASH_ADDR) = (addr & 0x1FFFFFF);
  215. M32(HR_FLASH_CMD_START) = CMD_START_Msk;
  216. return 0;
  217. }
  218. static int programPage (unsigned long adr, unsigned long sz, unsigned char *buf)
  219. {
  220. programSR(0x80009002, adr, buf, sz);
  221. return(0);
  222. }
  223. static int eraseSR(unsigned int cmd, unsigned long addr)
  224. {
  225. /*Write Enable*/
  226. writeEnable();
  227. M32(HR_FLASH_CMD_ADDR) = cmd;
  228. M32(HR_FLASH_ADDR) = (addr & 0x1FFFFFF);
  229. M32(HR_FLASH_CMD_START) = CMD_START_Msk;
  230. return 0;
  231. }
  232. static int eraseSector (unsigned long adr)
  233. {
  234. eraseSR(0x80000820, adr);
  235. return (0); // Finished without Errors
  236. }
  237. static unsigned int getFlashDensity(void)
  238. {
  239. unsigned char density = 0;
  240. M32(HR_FLASH_CMD_ADDR) = 0x2c09F;
  241. M32(HR_FLASH_CMD_START) = CMD_START_Msk;
  242. density = ((read_first_value() & 0xFFFFFF) >> 16) & 0xFF;
  243. // printf("density %x\n", density);
  244. if (density && (density <= 0x21)) /*just limit to (1<<33UL) Byte*/
  245. {
  246. return (1 << density);
  247. }
  248. return 0;
  249. }
  250. /*sr start*/
  251. /************************************************************
  252. addr:
  253. For GD, address:0x000,0x100
  254. For ESMT, address:0xFF000,0xFF100
  255. For WINBOND, address:0x1000
  256. *************************************************************/
  257. int readSR(unsigned int cmd, unsigned long addr, unsigned char *buf, unsigned long sz)
  258. {
  259. int i = 0;
  260. int word = sz / 4;
  261. int byte = sz % 4;
  262. unsigned long addr_read;
  263. M32(HR_FLASH_CMD_ADDR) = cmd | (((sz - 1) & 0x3FF) << 16);
  264. M32(HR_FLASH_ADDR) = addr & 0x1FFFFFF;
  265. M32(HR_FLASH_CMD_START) = CMD_START_Msk;
  266. addr_read = RSA_BASE_ADDRESS;
  267. for(i = 0; i < word; i ++)
  268. {
  269. M32(buf) = M32(addr_read);
  270. buf += 4;
  271. addr_read += 4;
  272. }
  273. if(byte > 0)
  274. {
  275. M32(buf) = M32(addr_read);
  276. buf += 3; //point last byte
  277. while(byte)
  278. {
  279. *buf = 0;
  280. buf --;
  281. byte --;
  282. }
  283. }
  284. return 0;
  285. }
  286. void flashSRRW(unsigned long offset, unsigned char *buf, unsigned long sz, unsigned char *backbuf, unsigned int backlen, unsigned int rd)
  287. {
  288. #define SR_TOTAL_SZ (512)
  289. #define SR_PROGRAM_SZE (256)
  290. unsigned int i;
  291. unsigned int j;
  292. unsigned int baseaddr = 0;
  293. unsigned int sectoroffset = 0;
  294. unsigned int sectorsize = 0;
  295. unsigned int sectornum = 0;
  296. unsigned int remainsz;
  297. unsigned int erasecmd = 0;
  298. unsigned int readcmd = 0;
  299. unsigned int writecmd = 0;
  300. unsigned char flashid = 0;
  301. if (!buf || ((rd == 0) && ( !backbuf || (backlen < 512))))
  302. {
  303. return;
  304. }
  305. flashid = readRID();
  306. switch(flashid)
  307. {
  308. case SPIFLASH_MID_GD:
  309. baseaddr = 0x0;
  310. sectoroffset = 256;
  311. sectorsize = 256;
  312. sectornum = 2;
  313. erasecmd = 0x80000844;
  314. readcmd = 0xBC00C048;
  315. writecmd = 0x80009042;
  316. break;
  317. case SPIFLASH_MID_ESMT:
  318. {
  319. baseaddr = 0xFF000;
  320. sectoroffset = 0;
  321. sectorsize = 512;
  322. sectornum = 1;
  323. erasecmd = 0x80000820;
  324. readcmd = 0xBC00C00B;
  325. writecmd = 0x80009002;
  326. M32(HR_FLASH_CMD_ADDR) = 0x3A; /*enter OTP*/
  327. M32(HR_FLASH_CMD_START) = CMD_START_Msk;
  328. }
  329. break;
  330. case SPIFLASH_MID_PUYA:
  331. baseaddr = 0x1000;
  332. sectoroffset = 0;
  333. sectorsize = 512;
  334. sectornum = 1;
  335. erasecmd = 0x80000844;
  336. readcmd = 0xBC00C048;
  337. writecmd = 0x80009042;
  338. break;
  339. default:
  340. {
  341. }
  342. break;
  343. }
  344. for (i = 0 ; i < sectornum; i++)
  345. {
  346. readSR(readcmd, baseaddr + sectoroffset * i, backbuf + i * sectorsize, sectorsize);
  347. }
  348. if (rd)
  349. {
  350. for(i = 0; i < sz; i++) //Copy
  351. {
  352. buf[i] = backbuf[i + offset];
  353. }
  354. }
  355. else
  356. {
  357. for (i = 0; i < sectornum ; i++)
  358. {
  359. eraseSR(erasecmd, baseaddr + sectoroffset * i);
  360. }
  361. remainsz = (sz < (SR_TOTAL_SZ - offset)) ? sz : (SR_TOTAL_SZ - offset);
  362. for(i = 0; i < remainsz; i++)
  363. {
  364. backbuf[i + offset] = buf[i];
  365. }
  366. for ( i = 0; i < sectornum; i++)
  367. {
  368. for (j = 0; j < (sectorsize / SR_PROGRAM_SZE); j++)
  369. {
  370. programSR(writecmd, baseaddr + sectoroffset * i + j * SR_PROGRAM_SZE, backbuf, SR_PROGRAM_SZE);
  371. backbuf += SR_PROGRAM_SZE;
  372. }
  373. }
  374. }
  375. if (SPIFLASH_MID_ESMT == flashid)
  376. {
  377. /*Write Disable*/
  378. M32(HR_FLASH_CMD_ADDR) = 0x4;
  379. M32(HR_FLASH_CMD_START) = CMD_START_Msk;
  380. }
  381. }
  382. /*sr end*/
  383. int __readByCMD(unsigned char cmd, unsigned long addr, unsigned char *buf, unsigned long sz)
  384. {
  385. int i = 0;
  386. int word = sz / 4;
  387. int byte = sz % 4;
  388. unsigned long addr_read;
  389. if (!(M32(HR_FLASH_CR)&0x1))/*non-QIO mode, only single line command can be used*/
  390. {
  391. if (cmd > 0x0B)
  392. {
  393. cmd = 0x0B;
  394. }
  395. }
  396. switch (cmd)
  397. {
  398. case 0x03:
  399. M32(HR_FLASH_CMD_ADDR) = 0x8000C003 | (((sz - 1) & 0x3FF) << 16);
  400. M32(HR_FLASH_ADDR) = addr & 0x1FFFFFF;
  401. M32(HR_FLASH_CMD_START) = CMD_START_Msk;
  402. break;
  403. case 0x0B:
  404. if((M32(HR_FLASH_CR) & 0x2) == 0x2)
  405. {
  406. M32(HR_FLASH_CMD_ADDR) = 0xB400C00B | (((sz - 1) & 0x3FF) << 16);
  407. }
  408. else
  409. {
  410. M32(HR_FLASH_CMD_ADDR) = 0xBC00C00B | (((sz - 1) & 0x3FF) << 16);
  411. }
  412. M32(HR_FLASH_ADDR) = addr & 0x1FFFFFF;
  413. M32(HR_FLASH_CMD_START) = CMD_START_Msk;
  414. break;
  415. case 0xBB:
  416. M32(HR_FLASH_CMD_ADDR) = 0xE400C0BB | (((sz - 1) & 0x3FF) << 16);
  417. M32(HR_FLASH_ADDR) = addr & 0x1FFFFFF;
  418. M32(HR_FLASH_CMD_START) = CMD_START_Msk;
  419. break;
  420. case 0xEB:
  421. M32(HR_FLASH_CMD_ADDR) = 0xEC00C0EB | (((sz - 1) & 0x3FF) << 16);
  422. M32(HR_FLASH_ADDR) = addr & 0x1FFFFFF;
  423. M32(HR_FLASH_CMD_START) = CMD_START_Msk;
  424. break;
  425. default:
  426. return -1;
  427. }
  428. // printf("delay delay delay delay\n");
  429. // dumpUint32("readByCMD RSA_BASE_ADDRESS", RSA_BASE_ADDRESS, sz/4);
  430. addr_read = RSA_BASE_ADDRESS;
  431. for(i = 0; i < word; i ++)
  432. {
  433. M32(buf) = M32(addr_read);
  434. buf += 4;
  435. addr_read += 4;
  436. }
  437. if(byte > 0)
  438. {
  439. M32(buf) = M32(addr_read);
  440. buf += 3; //point last byte
  441. byte = 4 - byte;
  442. while(byte)
  443. {
  444. *buf = 0;
  445. buf --;
  446. byte --;
  447. }
  448. }
  449. return 0;
  450. }
  451. /**
  452. * @brief This function is used to read data from the flash.
  453. *
  454. * @param[in] cmd 0xEB in QSPI mode; 0x0b in SPI mode.
  455. * @param[in] addr is byte offset addr for read from the flash.
  456. * @param[in] buf is user for data buffer of flash read
  457. * @param[in] len is byte length for read.
  458. *
  459. * @retval TLS_FLS_STATUS_OK if read sucsess
  460. * @retval TLS_FLS_STATUS_EPERM if inside fls does not initialized.
  461. *
  462. * @note None
  463. */
  464. int readByCMD(unsigned char cmd, unsigned long addr, unsigned char *buf, unsigned long sz)
  465. {
  466. if (inside_fls == NULL)
  467. {
  468. return TLS_FLS_STATUS_EPERM;
  469. }
  470. tls_os_sem_acquire(inside_fls->fls_lock, 0);
  471. __readByCMD(cmd, addr, buf, sz);
  472. tls_os_sem_release(inside_fls->fls_lock);
  473. return TLS_FLS_STATUS_OK;
  474. }
  475. int flashRead(unsigned long addr, unsigned char *buf, unsigned long sz)
  476. {
  477. #define INSIDE_FLS_MAX_RD_SIZE (1024)
  478. unsigned int flash_addr;
  479. unsigned int sz_pagenum = 0;
  480. unsigned int sz_remain = 0;
  481. int i = 0;
  482. int page_offset = addr & (INSIDE_FLS_PAGE_SIZE - 1);
  483. unsigned int max_size = 0;
  484. if ((page_offset == 0)
  485. && (((unsigned int)buf&0x3) == 0)
  486. && ((sz&0x3) == 0))/*Use 4-bytes aligned and buf must be 4 times, sz must be 4 times*/
  487. {
  488. flash_addr = addr;
  489. if (sz >= 512)
  490. {
  491. max_size = INSIDE_FLS_MAX_RD_SIZE;
  492. }
  493. else
  494. {
  495. max_size = INSIDE_FLS_PAGE_SIZE;
  496. }
  497. sz_pagenum = sz / max_size;
  498. sz_remain = sz % max_size;
  499. for (i = 0; i < sz_pagenum; i++)
  500. {
  501. __readByCMD(0xEB, flash_addr, (unsigned char *)buf, max_size);
  502. buf += max_size;
  503. flash_addr += max_size;
  504. }
  505. if (sz_remain)
  506. {
  507. __readByCMD(0xEB, flash_addr, (unsigned char *)buf, sz_remain);
  508. }
  509. }
  510. else
  511. {
  512. char *cache = NULL;
  513. cache = tls_mem_alloc(INSIDE_FLS_PAGE_SIZE);
  514. if (cache == NULL)
  515. {
  516. TLS_DBGPRT_ERR("allocate sector cache memory fail!\n");
  517. return TLS_FLS_STATUS_ENOMEM;
  518. }
  519. flash_addr = addr & ~(INSIDE_FLS_PAGE_SIZE - 1);
  520. __readByCMD(0xEB, flash_addr, (unsigned char *)cache, INSIDE_FLS_PAGE_SIZE);
  521. if (sz > INSIDE_FLS_PAGE_SIZE - page_offset)
  522. {
  523. MEMCPY(buf, cache + page_offset, INSIDE_FLS_PAGE_SIZE - page_offset);
  524. buf += INSIDE_FLS_PAGE_SIZE - page_offset;
  525. flash_addr += INSIDE_FLS_PAGE_SIZE;
  526. sz_pagenum = (sz - (INSIDE_FLS_PAGE_SIZE - page_offset)) / INSIDE_FLS_PAGE_SIZE;
  527. sz_remain = (sz - (INSIDE_FLS_PAGE_SIZE - page_offset)) % INSIDE_FLS_PAGE_SIZE;
  528. for (i = 0; i < sz_pagenum; i++)
  529. {
  530. __readByCMD(0xEB, flash_addr, (unsigned char *)cache, INSIDE_FLS_PAGE_SIZE);
  531. MEMCPY(buf, cache, INSIDE_FLS_PAGE_SIZE);
  532. buf += INSIDE_FLS_PAGE_SIZE;
  533. flash_addr += INSIDE_FLS_PAGE_SIZE;
  534. }
  535. if (sz_remain)
  536. {
  537. __readByCMD(0xEB, flash_addr, (unsigned char *)cache, sz_remain + (4- sz_remain%4));
  538. MEMCPY(buf, cache, sz_remain);
  539. }
  540. }
  541. else
  542. {
  543. MEMCPY(buf, cache + page_offset, sz);
  544. }
  545. tls_mem_free(cache);
  546. }
  547. return 0;
  548. }
  549. /**
  550. * @brief This function is used to unlock flash protect area [0x0~0x2000].
  551. *
  552. * @param None
  553. *
  554. * @return None
  555. *
  556. * @note None
  557. */
  558. int tls_flash_unlock(void)
  559. {
  560. //return flashunlock();
  561. return 0;
  562. }
  563. /**
  564. * @brief This function is used to lock flash protect area [0x0~0x2000].
  565. *
  566. * @param None
  567. *
  568. * @return None
  569. *
  570. * @note None
  571. */
  572. int tls_flash_lock(void)
  573. {
  574. //return flashlock();
  575. return 0;
  576. }
  577. /**
  578. * @brief This function is used to semaphore protect.
  579. *
  580. * @param None
  581. *
  582. * @return None
  583. *
  584. * @note None
  585. */
  586. void tls_fls_sem_lock(void)
  587. {
  588. if (inside_fls == NULL)
  589. {
  590. return;
  591. }
  592. tls_os_sem_acquire(inside_fls->fls_lock, 0);
  593. }
  594. /**
  595. * @brief This function is used to semaphore protect cancel.
  596. *
  597. * @param None
  598. *
  599. * @return None
  600. *
  601. * @note None
  602. */
  603. void tls_fls_sem_unlock(void)
  604. {
  605. if (inside_fls == NULL)
  606. {
  607. return;
  608. }
  609. tls_os_sem_release(inside_fls->fls_lock);
  610. }
  611. /**
  612. * @brief This function is used to read the unique id of the internal flash.
  613. *
  614. * @param[out] uuid Specified the address to save the uuid, the length must be greater than or equals to 18 bytes.
  615. *
  616. * @retval TLS_FLS_STATUS_OK if read sucsess
  617. * @retval TLS_FLS_STATUS_EIO if read fail
  618. *
  619. * @note The uuid's length must be greater than or equals to 18 bytes.
  620. */
  621. int tls_fls_read_unique_id(unsigned char *uuid)
  622. {
  623. unsigned int value = 0;
  624. unsigned int addr_read = 0;
  625. int i = 0;
  626. int len;
  627. unsigned char FLASH_BUF[20];
  628. unsigned char *addr = &FLASH_BUF[0];
  629. int dumy_bytes = 0;
  630. int uni_bytes = 0;
  631. unsigned char rid;
  632. int word;
  633. int byte;
  634. memset(uuid, 0xFF, 18);
  635. rid = readRID();
  636. switch(rid)
  637. {
  638. case SPIFLASH_MID_GD:
  639. case SPIFLASH_MID_PUYA:
  640. case SPIFLASH_MID_TSINGTENG:
  641. dumy_bytes = 4;
  642. uni_bytes = 16;
  643. break;
  644. case SPIFLASH_MID_WINBOND:
  645. case SPIFLASH_MID_FUDANMICRO:
  646. case SPIFLASH_MID_BOYA:
  647. case SPIFLASH_MID_XMC:
  648. dumy_bytes = 4;
  649. uni_bytes = 8;
  650. break;
  651. case SPIFLASH_MID_ESMT:
  652. case SPIFLASH_MID_XTX:
  653. default:
  654. return -1;
  655. }
  656. uuid[0] = rid;
  657. uuid[1] = (unsigned char)(uni_bytes & 0xFF);
  658. len = dumy_bytes + uni_bytes;
  659. word = len/4;
  660. byte = len%4;
  661. value = 0xC04B|((len-1) << 16);
  662. M32(HR_FLASH_CMD_ADDR) = value;
  663. M32(HR_FLASH_CMD_START) = CMD_START_Msk;
  664. addr_read = RSA_BASE_ADDRESS;
  665. for(i = 0;i < word; i ++)
  666. {
  667. M32(addr) = M32(addr_read);
  668. addr += 4;
  669. addr_read += 4;
  670. }
  671. if(byte > 0)
  672. {
  673. M32(addr) = M32(addr_read);
  674. addr += 3; //point last byte
  675. while(byte)
  676. {
  677. *addr = 0;
  678. addr --;
  679. byte --;
  680. }
  681. }
  682. addr = &FLASH_BUF[0];
  683. memcpy(&uuid[2], addr + dumy_bytes, uni_bytes);
  684. return 0;
  685. }
  686. int tls_fls_otp_read(u32 addr, u8 *buf, u32 len)
  687. {
  688. int err;
  689. int i = 0;
  690. int word = len/4;
  691. int byte = len%4;
  692. unsigned long addr_read = 0xBC00C048;
  693. volatile unsigned long value;
  694. unsigned long addr_offset = 0;
  695. unsigned long sz_need = len;
  696. if (inside_fls == NULL)
  697. {
  698. TLS_DBGPRT_ERR("flash driver module not beed installed!\n");
  699. return TLS_FLS_STATUS_EPERM;
  700. }
  701. tls_os_sem_acquire(inside_fls->fls_lock, 0);
  702. if(buf)
  703. {
  704. addr_offset = addr % 16;
  705. sz_need = (addr_offset + len + 16) / 16 * 16;
  706. addr = addr / 16 * 16;
  707. }
  708. M32(HR_FLASH_CMD_ADDR) = addr_read|(((sz_need-1)&0x3FF)<<16);
  709. M32(HR_FLASH_ADDR) = (addr&0x1FFFFFF);
  710. M32(HR_FLASH_CMD_START) = tls_reg_read32(HR_FLASH_CMD_START) | CMD_START_Msk;
  711. if(buf)
  712. {
  713. addr_read = RSA_BASE_ADDRESS + (addr_offset / 4 * 4);
  714. i = (4 - addr_offset % 4) % 4;
  715. if(i > len)
  716. {
  717. byte = len;
  718. }
  719. else
  720. {
  721. byte = i;
  722. }
  723. if(byte)
  724. {
  725. value = M32(addr_read);
  726. memcpy(buf, ((char *)&value) + 4 - i, byte);
  727. addr_read += 4;
  728. buf += byte;
  729. }
  730. word = (len - byte) / 4;
  731. for(i = 0;i < word; i ++)
  732. {
  733. value = M32(addr_read);
  734. memcpy(buf, (char*)&value, 4);
  735. buf += 4;
  736. addr_read += 4;
  737. }
  738. byte = (len - byte) % 4;
  739. if(byte > 0)
  740. {
  741. value = M32(addr_read);
  742. memcpy(buf, (char *)&value, byte);
  743. }
  744. }
  745. err = TLS_FLS_STATUS_OK;
  746. tls_os_sem_release(inside_fls->fls_lock);
  747. return err;
  748. }
  749. int tls_fls_otp_write(u32 addr, u8 *buf, u32 len)
  750. {
  751. int ret = 0;
  752. unsigned int erasecmd = 0x80000844;
  753. unsigned int writecmd = 0x80009042;
  754. uint32_t eraseAddr = 0;
  755. uint16_t eraseSize = 0;
  756. uint16_t pageSize = 0;
  757. unsigned char flashid = 0;
  758. int l = 0;
  759. unsigned char *backbuf = NULL;
  760. unsigned long size = 0;
  761. unsigned long p = 0;
  762. unsigned char *q = NULL;
  763. if (!buf)
  764. {
  765. return TLS_FLS_STATUS_EINVAL;
  766. }
  767. if (inside_fls == NULL)
  768. {
  769. TLS_DBGPRT_ERR("flash driver module not beed installed!\n");
  770. return TLS_FLS_STATUS_EPERM;
  771. }
  772. eraseSize = inside_fls->OTPWRParam.eraseSize;
  773. pageSize = inside_fls->OTPWRParam.pageSize;
  774. if (eraseSize == 0 || pageSize == 0)
  775. {
  776. TLS_DBGPRT_ERR("flash type is not supported!\n");
  777. return TLS_FLS_STATUS_ENOSUPPORT;
  778. }
  779. eraseAddr = addr & ~(eraseSize - 1);
  780. if(addr < eraseAddr || len > eraseSize - (addr - eraseAddr))
  781. {
  782. return TLS_FLS_STATUS_EINVAL;
  783. }
  784. TLS_DBGPRT_INFO("addr 0x%x, eraseAddr 0x%x, eraseSize 0x%x, pageSize 0x%x\n", addr, eraseAddr, eraseSize, pageSize);
  785. backbuf = tls_mem_alloc(eraseSize);
  786. if (!backbuf)
  787. {
  788. ret = TLS_FLS_STATUS_ENOMEM;
  789. goto out;
  790. }
  791. p = eraseAddr;
  792. q = backbuf;
  793. size = eraseSize;
  794. while(size > 0)
  795. {
  796. l = size > pageSize ? pageSize : size;
  797. if(tls_fls_otp_read(p, q, l) != TLS_FLS_STATUS_OK)
  798. {
  799. ret = TLS_FLS_STATUS_EPERM;
  800. goto out;
  801. }
  802. q += l;
  803. p += l;
  804. size -= l;
  805. }
  806. eraseSR(erasecmd, eraseAddr);
  807. memcpy(backbuf + (addr - eraseAddr), buf, len);
  808. p = eraseAddr;
  809. q = backbuf;
  810. size = eraseSize;
  811. while(size > 0)
  812. {
  813. l = size > pageSize ? pageSize : size;
  814. programSR(writecmd, p, q, l);
  815. q += l;
  816. p += l;
  817. size -= l;
  818. }
  819. out:
  820. if(backbuf)
  821. tls_mem_free(backbuf);
  822. return ret;
  823. }
  824. int tls_fls_otp_lock(void)
  825. {
  826. if (inside_fls == NULL)
  827. {
  828. TLS_DBGPRT_ERR("flash driver module not beed installed!\n");
  829. return TLS_FLS_STATUS_EPERM;
  830. }
  831. switch(inside_fls->flashid)
  832. {
  833. case SPIFLASH_MID_GD:
  834. case SPIFLASH_MID_TSINGTENG:
  835. writeLbBit_for_1wreg((1<<10));
  836. break;
  837. case SPIFLASH_MID_FUDANMICRO:
  838. writeLbBit_for_2wreg((1<<10));
  839. break;
  840. case SPIFLASH_MID_BOYA:
  841. case SPIFLASH_MID_XMC:
  842. case SPIFLASH_MID_WINBOND:
  843. case SPIFLASH_MID_PUYA:
  844. writeLbBit_for_2wreg((7<<11));
  845. break;
  846. case SPIFLASH_MID_XTX:
  847. case SPIFLASH_MID_ESMT:
  848. default:
  849. TLS_DBGPRT_ERR("flash is not supported!\n");
  850. return TLS_FLS_STATUS_ENOSUPPORT;
  851. }
  852. return 0;
  853. }
  854. /**
  855. * @brief This function is used to read data from the flash.
  856. *
  857. * @param[in] addr is byte offset addr for read from the flash.
  858. * @param[in] buf is user for data buffer of flash read
  859. * @param[in] len is byte length for read.
  860. *
  861. * @retval TLS_FLS_STATUS_OK if read sucsess
  862. * @retval TLS_FLS_STATUS_EIO if read fail
  863. *
  864. * @note None
  865. */
  866. int tls_fls_read(u32 addr, u8 *buf, u32 len)
  867. {
  868. int err;
  869. if (inside_fls == NULL)
  870. {
  871. TLS_DBGPRT_ERR("flash driver module not beed installed!\n");
  872. return TLS_FLS_STATUS_EPERM;
  873. }
  874. if (((addr & (INSIDE_FLS_BASE_ADDR - 1)) >= getFlashDensity()) || (len == 0) || (buf == NULL))
  875. {
  876. return TLS_FLS_STATUS_EINVAL;
  877. }
  878. tls_os_sem_acquire(inside_fls->fls_lock, 0);
  879. flashRead(addr, buf, len);
  880. err = TLS_FLS_STATUS_OK;
  881. tls_os_sem_release(inside_fls->fls_lock);
  882. return err;
  883. }
  884. /**
  885. * @brief This function is used to write data to the flash.
  886. *
  887. * @param[in] addr is byte offset addr for write to the flash
  888. * @param[in] buf is the data buffer want to write to flash
  889. * @param[in] len is the byte length want to write
  890. *
  891. * @retval TLS_FLS_STATUS_OK if write flash success
  892. * @retval TLS_FLS_STATUS_EPERM if flash struct point is null
  893. * @retval TLS_FLS_STATUS_ENODRV if flash driver is not installed
  894. * @retval TLS_FLS_STATUS_EINVAL if argument is invalid
  895. * @retval TLS_FLS_STATUS_EIO if io error
  896. *
  897. * @note None
  898. */
  899. int tls_fls_write(u32 addr, u8 *buf, u32 len)
  900. {
  901. u8 *cache;
  902. unsigned int secpos;
  903. unsigned int secoff;
  904. unsigned int secremain;
  905. unsigned int i;
  906. unsigned int offaddr;
  907. if (inside_fls == NULL)
  908. {
  909. TLS_DBGPRT_ERR("flash driver module not beed installed!\n");
  910. return TLS_FLS_STATUS_EPERM;
  911. }
  912. if (((addr & (INSIDE_FLS_BASE_ADDR - 1)) >= getFlashDensity()) || (len == 0) || (buf == NULL))
  913. {
  914. return TLS_FLS_STATUS_EINVAL;
  915. }
  916. tls_os_sem_acquire(inside_fls->fls_lock, 0);
  917. cache = tls_mem_alloc(INSIDE_FLS_SECTOR_SIZE);
  918. if (cache == NULL)
  919. {
  920. tls_os_sem_release(inside_fls->fls_lock);
  921. TLS_DBGPRT_ERR("allocate sector cache memory fail!\n");
  922. return TLS_FLS_STATUS_ENOMEM;
  923. }
  924. offaddr = addr & (INSIDE_FLS_BASE_ADDR - 1); //Offset of 0X08000000
  925. secpos = offaddr / INSIDE_FLS_SECTOR_SIZE; //Section addr
  926. secoff = (offaddr % INSIDE_FLS_SECTOR_SIZE); //Offset in section
  927. secremain = INSIDE_FLS_SECTOR_SIZE - secoff; // 扇区剩余空间大小
  928. if(len <= secremain)
  929. {
  930. secremain = len; //Not bigger with remain size in section
  931. }
  932. while (1)
  933. {
  934. flashRead(secpos * INSIDE_FLS_SECTOR_SIZE, cache, INSIDE_FLS_SECTOR_SIZE);
  935. eraseSector(secpos * INSIDE_FLS_SECTOR_SIZE);
  936. for (i = 0; i < secremain; i++) // 复制
  937. {
  938. cache[i + secoff] = buf[i];
  939. }
  940. for (i = 0; i < (INSIDE_FLS_SECTOR_SIZE / INSIDE_FLS_PAGE_SIZE); i++)
  941. {
  942. programPage(secpos * INSIDE_FLS_SECTOR_SIZE + i * INSIDE_FLS_PAGE_SIZE, INSIDE_FLS_PAGE_SIZE, &cache[i * INSIDE_FLS_PAGE_SIZE]); //Write
  943. }
  944. if(len == secremain)
  945. {
  946. break; // 写入结束了
  947. }
  948. else // 写入未结束
  949. {
  950. secpos++; // 扇区地址增1
  951. secoff = 0; // 偏移位置为0
  952. buf += secremain; // 指针偏移
  953. len -= secremain;
  954. if(len > (INSIDE_FLS_SECTOR_SIZE))
  955. secremain = INSIDE_FLS_SECTOR_SIZE; // 下一个扇区还是写不完
  956. else
  957. secremain = len; //Next section will finish
  958. }
  959. }
  960. tls_mem_free(cache);
  961. tls_os_sem_release(inside_fls->fls_lock);
  962. return TLS_FLS_STATUS_OK;
  963. }
  964. /**
  965. * @brief This function is used to erase the appoint sector
  966. *
  967. * @param[in] sector sector num of the flash, 4K byte a sector
  968. *
  969. * @retval TLS_FLS_STATUS_OK if read sucsess
  970. * @retval other if read fail
  971. *
  972. * @note None
  973. */
  974. int tls_fls_erase(u32 sector)
  975. {
  976. u32 addr;
  977. if (inside_fls == NULL)
  978. {
  979. TLS_DBGPRT_ERR("flash driver module not beed installed!\n");
  980. return TLS_FLS_STATUS_EPERM;
  981. }
  982. if (sector >= (getFlashDensity() / INSIDE_FLS_SECTOR_SIZE + INSIDE_FLS_BASE_ADDR / INSIDE_FLS_SECTOR_SIZE))
  983. {
  984. TLS_DBGPRT_ERR("the sector to be erase overflow!\n");
  985. return TLS_FLS_STATUS_EINVAL;
  986. }
  987. tls_os_sem_acquire(inside_fls->fls_lock, 0);
  988. addr = sector * INSIDE_FLS_SECTOR_SIZE;
  989. eraseSector(addr);
  990. tls_os_sem_release(inside_fls->fls_lock);
  991. return TLS_FLS_STATUS_OK;
  992. }
  993. static u8 *gsflscache = NULL;
  994. //static u32 gsSecOffset = 0;
  995. static u32 gsSector = 0;
  996. /**
  997. * @brief This function is used to flush the appoint sector
  998. *
  999. * @param None
  1000. *
  1001. * @return None
  1002. *
  1003. * @note None
  1004. */
  1005. static void tls_fls_flush_sector(void)
  1006. {
  1007. int i;
  1008. u32 addr;
  1009. if (gsSector < (getFlashDensity() / INSIDE_FLS_SECTOR_SIZE + INSIDE_FLS_BASE_ADDR / INSIDE_FLS_SECTOR_SIZE))
  1010. {
  1011. addr = gsSector * INSIDE_FLS_SECTOR_SIZE;
  1012. eraseSector(addr);
  1013. for (i = 0; i < INSIDE_FLS_SECTOR_SIZE / INSIDE_FLS_PAGE_SIZE; i++)
  1014. {
  1015. programPage(gsSector * INSIDE_FLS_SECTOR_SIZE +
  1016. i * INSIDE_FLS_PAGE_SIZE, INSIDE_FLS_PAGE_SIZE,
  1017. &gsflscache[i * INSIDE_FLS_PAGE_SIZE]);
  1018. }
  1019. }
  1020. //gsSecOffset = 0;
  1021. }
  1022. /**
  1023. * @brief This function is used to fast write flash initialize
  1024. *
  1025. * @param None
  1026. *
  1027. * @retval TLS_FLS_STATUS_OK sucsess
  1028. * @retval other fail
  1029. *
  1030. * @note None
  1031. */
  1032. int tls_fls_fast_write_init(void)
  1033. {
  1034. if (inside_fls == NULL)
  1035. {
  1036. TLS_DBGPRT_ERR("flash driver module not beed installed!\n");
  1037. return TLS_FLS_STATUS_EPERM;
  1038. }
  1039. if (NULL != gsflscache)
  1040. {
  1041. TLS_DBGPRT_ERR("tls_fls_fast_write_init installed!\n");
  1042. return -1;
  1043. }
  1044. gsflscache = tls_mem_alloc(INSIDE_FLS_SECTOR_SIZE);
  1045. if (NULL == gsflscache)
  1046. {
  1047. TLS_DBGPRT_ERR("tls_fls_fast_write_init malloc err!\n");
  1048. return -1;
  1049. }
  1050. return TLS_FLS_STATUS_OK;
  1051. }
  1052. /**
  1053. * @brief This function is used to destroy fast write flash
  1054. *
  1055. * @param None
  1056. *
  1057. * @return None
  1058. *
  1059. * @note None
  1060. */
  1061. void tls_fls_fast_write_destroy(void)
  1062. {
  1063. if (NULL != gsflscache)
  1064. {
  1065. if (inside_fls == NULL)
  1066. {
  1067. TLS_DBGPRT_ERR("flash driver module not beed installed!\n");
  1068. return;
  1069. }
  1070. else
  1071. {
  1072. tls_os_sem_acquire(inside_fls->fls_lock, 0);
  1073. tls_fls_flush_sector();
  1074. tls_os_sem_release(inside_fls->fls_lock);
  1075. }
  1076. tls_mem_free(gsflscache);
  1077. gsflscache = NULL;
  1078. }
  1079. }
  1080. /**
  1081. * @brief This function is used to fast write data to the flash.
  1082. *
  1083. * @param[in] addr is byte offset addr for write to the flash
  1084. * @param[in] buf is the data buffer want to write to flash
  1085. * @param[in] length is the byte length want to write
  1086. *
  1087. * @retval TLS_FLS_STATUS_OK success
  1088. * @retval other fail
  1089. *
  1090. * @note None
  1091. */
  1092. int tls_fls_fast_write(u32 addr, u8 *buf, u32 length)
  1093. {
  1094. u32 sector, offset, maxlen, len;
  1095. if (inside_fls == NULL)
  1096. {
  1097. TLS_DBGPRT_ERR("flash driver module not beed installed!\n");
  1098. return TLS_FLS_STATUS_EPERM;
  1099. }
  1100. if(((addr & (INSIDE_FLS_BASE_ADDR - 1)) >= getFlashDensity()) || (length == 0) || (buf == NULL))
  1101. {
  1102. return TLS_FLS_STATUS_EINVAL;
  1103. }
  1104. tls_os_sem_acquire(inside_fls->fls_lock, 0);
  1105. sector = addr / INSIDE_FLS_SECTOR_SIZE;
  1106. offset = addr % INSIDE_FLS_SECTOR_SIZE;
  1107. maxlen = INSIDE_FLS_SECTOR_SIZE;
  1108. if ((sector != gsSector) && (gsSector != 0))
  1109. {
  1110. tls_fls_flush_sector();
  1111. }
  1112. gsSector = sector;
  1113. if (offset > 0)
  1114. {
  1115. maxlen -= offset;
  1116. }
  1117. while (length > 0)
  1118. {
  1119. len = (length > maxlen) ? maxlen : length;
  1120. MEMCPY(gsflscache + offset, buf, len);
  1121. if (offset + len >= INSIDE_FLS_SECTOR_SIZE)
  1122. {
  1123. tls_fls_flush_sector();
  1124. gsSector++;
  1125. }
  1126. offset = 0;
  1127. maxlen = INSIDE_FLS_SECTOR_SIZE;
  1128. sector++;
  1129. buf += len;
  1130. length -= len;
  1131. }
  1132. tls_os_sem_release(inside_fls->fls_lock);
  1133. return TLS_FLS_STATUS_OK;
  1134. }
  1135. /**
  1136. * @brief This function is used to erase flash all chip
  1137. *
  1138. * @param None
  1139. *
  1140. * @retval TLS_FLS_STATUS_OK sucsess
  1141. * @retval other fail
  1142. *
  1143. * @note None
  1144. */
  1145. int tls_fls_chip_erase(void)
  1146. {
  1147. int i, j;
  1148. u8 *cache;
  1149. if (inside_fls == NULL)
  1150. {
  1151. TLS_DBGPRT_ERR("flash driver module not beed installed!\n");
  1152. return TLS_FLS_STATUS_EPERM;
  1153. }
  1154. tls_os_sem_acquire(inside_fls->fls_lock, 0);
  1155. cache = tls_mem_alloc(INSIDE_FLS_SECTOR_SIZE);
  1156. if (cache == NULL)
  1157. {
  1158. tls_os_sem_release(inside_fls->fls_lock);
  1159. TLS_DBGPRT_ERR("allocate sector cache memory fail!\n");
  1160. return TLS_FLS_STATUS_ENOMEM;
  1161. }
  1162. for( i = 0; i < ( getFlashDensity() - (INSIDE_FLS_SECBOOT_ADDR & 0xFFFFF)) / INSIDE_FLS_SECTOR_SIZE; i ++)
  1163. {
  1164. flashRead(INSIDE_FLS_SECBOOT_ADDR + i * INSIDE_FLS_SECTOR_SIZE, cache, INSIDE_FLS_SECTOR_SIZE);
  1165. for (j = 0; j < INSIDE_FLS_SECTOR_SIZE; j++)
  1166. {
  1167. if (cache[j] != 0xFF)
  1168. {
  1169. eraseSector(INSIDE_FLS_SECBOOT_ADDR + i * INSIDE_FLS_SECTOR_SIZE);
  1170. break;
  1171. }
  1172. }
  1173. }
  1174. tls_mem_free(cache);
  1175. tls_os_sem_release(inside_fls->fls_lock);
  1176. return TLS_FLS_STATUS_OK;
  1177. }
  1178. /**
  1179. * @brief This function is used to get flash param
  1180. *
  1181. * @param[in] type the type of the param need to get
  1182. * @param[out] param point to addr of out param
  1183. *
  1184. * @retval TLS_FLS_STATUS_OK sucsess
  1185. * @retval other fail
  1186. *
  1187. * @note None
  1188. */
  1189. int tls_fls_get_param(u8 type, void *param)
  1190. {
  1191. int err;
  1192. if (inside_fls == NULL)
  1193. {
  1194. TLS_DBGPRT_ERR("flash driver module not beed installed!\n");
  1195. return TLS_FLS_STATUS_EPERM;
  1196. }
  1197. if (param == NULL)
  1198. {
  1199. return TLS_FLS_STATUS_EINVAL;
  1200. }
  1201. tls_os_sem_acquire(inside_fls->fls_lock, 0);
  1202. err = TLS_FLS_STATUS_OK;
  1203. switch (type)
  1204. {
  1205. case TLS_FLS_PARAM_TYPE_ID:
  1206. *((u32 *) param) = 0x2013;
  1207. break;
  1208. case TLS_FLS_PARAM_TYPE_SIZE:
  1209. *((u32 *) param) = getFlashDensity();
  1210. break;
  1211. case TLS_FLS_PARAM_TYPE_PAGE_SIZE:
  1212. *((u32 *) param) = INSIDE_FLS_PAGE_SIZE;
  1213. break;
  1214. case TLS_FLS_PARAM_TYPE_PROG_SIZE:
  1215. *((u32 *) param) = INSIDE_FLS_PAGE_SIZE;
  1216. break;
  1217. case TLS_FLS_PARAM_TYPE_SECTOR_SIZE:
  1218. *((u32 *) param) = INSIDE_FLS_SECTOR_SIZE;
  1219. break;
  1220. default:
  1221. TLS_DBGPRT_WARNING("invalid parameter ID!\n");
  1222. err = TLS_FLS_STATUS_EINVAL;
  1223. break;
  1224. }
  1225. tls_os_sem_release(inside_fls->fls_lock);
  1226. return err;
  1227. }
  1228. /**
  1229. * @brief This function is used to initialize the flash module
  1230. *
  1231. * @param None
  1232. *
  1233. * @retval TLS_FLS_STATUS_OK sucsess
  1234. * @retval other fail
  1235. *
  1236. * @note None
  1237. */
  1238. int tls_fls_init(void)
  1239. {
  1240. struct tls_inside_fls *fls;
  1241. int err;
  1242. if (inside_fls != NULL)
  1243. {
  1244. TLS_DBGPRT_ERR("flash driver module has been installed!\n");
  1245. return TLS_FLS_STATUS_EBUSY;
  1246. }
  1247. fls = (struct tls_inside_fls *) tls_mem_alloc(sizeof(struct tls_inside_fls));
  1248. if (fls == NULL)
  1249. {
  1250. TLS_DBGPRT_ERR("allocate @inside_fls fail!\n");
  1251. return TLS_FLS_STATUS_ENOMEM;
  1252. }
  1253. memset(fls, 0, sizeof(*fls));
  1254. err = tls_os_sem_create(&fls->fls_lock, 1);
  1255. if (err != TLS_OS_SUCCESS)
  1256. {
  1257. tls_mem_free(fls);
  1258. TLS_DBGPRT_ERR("create semaphore @fls_lock fail!\n");
  1259. return TLS_FLS_STATUS_ENOMEM;
  1260. }
  1261. fls->flashid = readRID();
  1262. // printf("flashid %x\n", fls->flashid);
  1263. fls->density = getFlashDensity();
  1264. fls->OTPWRParam.pageSize = 256;
  1265. switch(fls->flashid)
  1266. {
  1267. case SPIFLASH_MID_GD:
  1268. fls->OTPWRParam.eraseSize = 1024;
  1269. break;
  1270. case SPIFLASH_MID_FUDANMICRO:
  1271. fls->OTPWRParam.eraseSize = 1024;
  1272. if(fls->density <= (1 << 20))//8Mbit
  1273. {
  1274. fls->OTPWRParam.eraseSize = 256;
  1275. }
  1276. break;
  1277. case SPIFLASH_MID_TSINGTENG:
  1278. case SPIFLASH_MID_BOYA:
  1279. case SPIFLASH_MID_XMC:
  1280. case SPIFLASH_MID_WINBOND:
  1281. fls->OTPWRParam.eraseSize = 256;
  1282. break;
  1283. case SPIFLASH_MID_PUYA:
  1284. fls->OTPWRParam.eraseSize = 512;
  1285. break;
  1286. case SPIFLASH_MID_XTX:
  1287. case SPIFLASH_MID_ESMT:
  1288. fls->OTPWRParam.eraseSize = 0;//not support
  1289. break;
  1290. default:
  1291. tls_mem_free(fls);
  1292. TLS_DBGPRT_ERR("flash is not supported!\n");
  1293. return TLS_FLS_STATUS_ENOSUPPORT;
  1294. }
  1295. inside_fls = fls;
  1296. return TLS_FLS_STATUS_OK;
  1297. }
  1298. int tls_fls_exit(void)
  1299. {
  1300. TLS_DBGPRT_FLASH_INFO("Not support flash driver module uninstalled!\n");
  1301. return TLS_FLS_STATUS_EPERM;
  1302. }
  1303. /**
  1304. * @brief This function is used to initialize system parameter postion by flash density
  1305. *
  1306. * @param None
  1307. *
  1308. * @retval None
  1309. *
  1310. * @note must be called before function tls_param_init
  1311. */
  1312. void tls_fls_sys_param_postion_init(void)
  1313. {
  1314. unsigned int density = 0;
  1315. int err;
  1316. err = tls_fls_get_param(TLS_FLS_PARAM_TYPE_SIZE, (void *)&density);
  1317. if (TLS_FLS_STATUS_OK == err)
  1318. {
  1319. TLS_FLASH_END_ADDR = (FLASH_BASE_ADDR|density) - 1;
  1320. TLS_FLASH_OTA_FLAG_ADDR = (FLASH_BASE_ADDR|density) - 0x1000;
  1321. TLS_FLASH_PARAM_RESTORE_ADDR = (FLASH_BASE_ADDR|density) - 0x2000;
  1322. TLS_FLASH_PARAM2_ADDR = (FLASH_BASE_ADDR|density) - 0x3000;
  1323. TLS_FLASH_PARAM1_ADDR = (FLASH_BASE_ADDR|density) - 0x4000;
  1324. TLS_FLASH_PARAM_DEFAULT = (FLASH_BASE_ADDR|density) - 0x5000;
  1325. }
  1326. else
  1327. {
  1328. TLS_DBGPRT_ERR("system parameter postion use default!\n");
  1329. }
  1330. }