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@@ -58,23 +58,23 @@ int luat_pwm_open(int channel, size_t period, size_t pulse,int pnum) {
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int ret = -1;
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switch (channel)
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{
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-#ifdef AIR101
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- case 0:
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- wm_pwm0_config(WM_IO_PB_00);
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- break;
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- case 1:
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- wm_pwm1_config(WM_IO_PB_01);
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- break;
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- case 2:
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- wm_pwm2_config(WM_IO_PB_02);
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- break;
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- case 3:
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- wm_pwm3_config(WM_IO_PB_03);
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- break;
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- case 4:
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- wm_pwm4_config(WM_IO_PA_07);
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- break;
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-#else
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+// #ifdef AIR101
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+// case 0:
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+// wm_pwm0_config(WM_IO_PB_00);
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+// break;
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+// case 1:
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+// wm_pwm1_config(WM_IO_PB_01);
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+// break;
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+// case 2:
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+// wm_pwm2_config(WM_IO_PB_02);
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+// break;
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+// case 3:
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+// wm_pwm3_config(WM_IO_PB_03);
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+// break;
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+// case 4:
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+// wm_pwm4_config(WM_IO_PA_07);
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+// break;
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+// #else
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case 00:
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wm_pwm0_config(WM_IO_PB_00);
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break;
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@@ -135,14 +135,14 @@ int luat_pwm_open(int channel, size_t period, size_t pulse,int pnum) {
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case 34:
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wm_pwm4_config(WM_IO_PB_26);
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break;
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-#endif
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+// #endif
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// TODO 再选一组PWM0~PWM4
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default:
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break;
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}
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-#ifdef AIR103
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+// #ifdef AIR103
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channel = channel%10;
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-#endif
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+// #endif
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tls_pwm_stop(channel);
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ret = tls_pwm_init(channel, period, pulse*2.55, pnum);
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if(ret != WM_SUCCESS)
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@@ -157,38 +157,38 @@ int luat_pwm_capture(int channel,int freq) {
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tls_sys_clk sysclk;
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tls_sys_clk_get(&sysclk);
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switch (channel){
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-#ifdef AIR101
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- case 0:
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- memset(pwmDmaCap0, 0, sizeof(pwmDmaCap0)/sizeof(char));
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- wm_pwm0_config(WM_IO_PB_00);
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- tls_pwm_stop(channel);
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- dmaCh = tls_dma_request(1, TLS_DMA_FLAGS_CHANNEL_SEL(TLS_DMA_SEL_PWM_CAP0) | TLS_DMA_FLAGS_HARD_MODE);
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- DmaDesc.src_addr = HR_PWM_CAPDAT;
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- DmaDesc.dest_addr = (unsigned int)pwmDmaCap0;
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- DmaDesc.dma_ctrl = TLS_DMA_DESC_CTRL_DEST_ADD_INC | TLS_DMA_DESC_CTRL_BURST_SIZE1 | TLS_DMA_DESC_CTRL_DATA_SIZE_WORD | TLS_DMA_DESC_CTRL_TOTAL_BYTES(400);
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- DmaDesc.valid = TLS_DMA_DESC_VALID;
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- DmaDesc.next = NULL;
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- tls_dma_start(dmaCh, &DmaDesc, 0);
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- tls_dma_irq_register(dmaCh, pwm_dma_callback, (void*)channel, TLS_DMA_IRQ_TRANSFER_DONE);
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- tls_pwm_cap_init(channel, sysclk.apbclk*UNIT_MHZ/256/freq, DISABLE, WM_PWM_CAP_DMA_INT);
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- tls_pwm_start(channel);
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- return 0;
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- case 4:
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- memset(pwmDmaCap4, 0, sizeof(pwmDmaCap4)/sizeof(char));
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- wm_pwm4_config(WM_IO_PA_07);
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- tls_pwm_stop(channel);
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- dmaCh = tls_dma_request(1, TLS_DMA_FLAGS_CHANNEL_SEL(TLS_DMA_SEL_PWM_CAP0) | TLS_DMA_FLAGS_HARD_MODE);
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- DmaDesc.src_addr = HR_PWM_CAPDAT;
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- DmaDesc.dest_addr = (unsigned int)pwmDmaCap4;
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- DmaDesc.dma_ctrl = TLS_DMA_DESC_CTRL_DEST_ADD_INC | TLS_DMA_DESC_CTRL_BURST_SIZE1 | TLS_DMA_DESC_CTRL_DATA_SIZE_WORD | TLS_DMA_DESC_CTRL_TOTAL_BYTES(400);
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- DmaDesc.valid = TLS_DMA_DESC_VALID;
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- DmaDesc.next = NULL;
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- tls_dma_start(dmaCh, &DmaDesc, 0);
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- tls_dma_irq_register(dmaCh, pwm_dma_callback, (void*)channel, TLS_DMA_IRQ_TRANSFER_DONE);
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- tls_pwm_cap_init(channel, sysclk.apbclk*UNIT_MHZ/256/freq, DISABLE, WM_PWM_CAP_DMA_INT);
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- tls_pwm_start(channel);
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- return 0;
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-#else
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+// #ifdef AIR101
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+// case 0:
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+// memset(pwmDmaCap0, 0, sizeof(pwmDmaCap0)/sizeof(char));
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+// wm_pwm0_config(WM_IO_PB_00);
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+// tls_pwm_stop(channel);
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+// dmaCh = tls_dma_request(1, TLS_DMA_FLAGS_CHANNEL_SEL(TLS_DMA_SEL_PWM_CAP0) | TLS_DMA_FLAGS_HARD_MODE);
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+// DmaDesc.src_addr = HR_PWM_CAPDAT;
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+// DmaDesc.dest_addr = (unsigned int)pwmDmaCap0;
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+// DmaDesc.dma_ctrl = TLS_DMA_DESC_CTRL_DEST_ADD_INC | TLS_DMA_DESC_CTRL_BURST_SIZE1 | TLS_DMA_DESC_CTRL_DATA_SIZE_WORD | TLS_DMA_DESC_CTRL_TOTAL_BYTES(400);
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+// DmaDesc.valid = TLS_DMA_DESC_VALID;
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+// DmaDesc.next = NULL;
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+// tls_dma_start(dmaCh, &DmaDesc, 0);
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+// tls_dma_irq_register(dmaCh, pwm_dma_callback, (void*)channel, TLS_DMA_IRQ_TRANSFER_DONE);
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+// tls_pwm_cap_init(channel, sysclk.apbclk*UNIT_MHZ/256/freq, DISABLE, WM_PWM_CAP_DMA_INT);
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+// tls_pwm_start(channel);
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+// return 0;
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+// case 4:
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+// memset(pwmDmaCap4, 0, sizeof(pwmDmaCap4)/sizeof(char));
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+// wm_pwm4_config(WM_IO_PA_07);
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+// tls_pwm_stop(channel);
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+// dmaCh = tls_dma_request(1, TLS_DMA_FLAGS_CHANNEL_SEL(TLS_DMA_SEL_PWM_CAP0) | TLS_DMA_FLAGS_HARD_MODE);
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+// DmaDesc.src_addr = HR_PWM_CAPDAT;
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+// DmaDesc.dest_addr = (unsigned int)pwmDmaCap4;
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+// DmaDesc.dma_ctrl = TLS_DMA_DESC_CTRL_DEST_ADD_INC | TLS_DMA_DESC_CTRL_BURST_SIZE1 | TLS_DMA_DESC_CTRL_DATA_SIZE_WORD | TLS_DMA_DESC_CTRL_TOTAL_BYTES(400);
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+// DmaDesc.valid = TLS_DMA_DESC_VALID;
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+// DmaDesc.next = NULL;
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+// tls_dma_start(dmaCh, &DmaDesc, 0);
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+// tls_dma_irq_register(dmaCh, pwm_dma_callback, (void*)channel, TLS_DMA_IRQ_TRANSFER_DONE);
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+// tls_pwm_cap_init(channel, sysclk.apbclk*UNIT_MHZ/256/freq, DISABLE, WM_PWM_CAP_DMA_INT);
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+// tls_pwm_start(channel);
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+// return 0;
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+// #else
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case 00:
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channel = channel%10;
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memset(pwmDmaCap0, 0, sizeof(pwmDmaCap0)/sizeof(char));
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@@ -348,7 +348,7 @@ int luat_pwm_capture(int channel,int freq) {
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tls_pwm_cap_init(channel, sysclk.apbclk*UNIT_MHZ/256/freq, DISABLE, WM_PWM_CAP_DMA_INT);
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tls_pwm_start(channel);
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return 0;
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-#endif
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+// #endif
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// TODO 再选一组PWM0~PWM4
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default:
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break;
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@@ -359,9 +359,9 @@ int luat_pwm_capture(int channel,int freq) {
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// @return -1 关闭失败。 0 关闭成功
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int luat_pwm_close(int channel) {
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int ret = -1;
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-#ifdef AIR103
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+// #ifdef AIR103
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channel = channel%10;
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-#endif
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+// #endif
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ret = tls_pwm_stop(channel);
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if(ret != WM_SUCCESS)
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return ret;
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