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@@ -218,6 +218,50 @@ void tls_gpio_write(enum tls_io_name gpio_pin, u8 value)
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tls_os_release_critical(cpu_sr);
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}
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+//hyj
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+void tls_gpio_pulse(enum tls_io_name gpio_pin,u16 delay,u8* level,u16 len)
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+{
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+ u32 cpu_sr = 0;
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+ u32 reg;
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+ u32 reg_en;
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+ u8 pin;
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+ u16 offset;
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+ u16 i;
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+ volatile u32 del=delay;
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+ if (gpio_pin >= WM_IO_PB_00)
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+ {
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+ pin = gpio_pin - WM_IO_PB_00;
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+ offset = TLS_IO_AB_OFFSET;
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+ }
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+ else
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+ {
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+ pin = gpio_pin;
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+ offset = 0;
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+ }
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+
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+
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+ cpu_sr = tls_os_set_critical();
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+
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+ reg_en = tls_reg_read32(HR_GPIO_DATA_EN + offset);
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+ tls_reg_write32(HR_GPIO_DATA_EN + offset, reg_en | (1 << pin));
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+
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+ reg = tls_reg_read32(HR_GPIO_DATA + offset);
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+ for(i=0;i<len;i++)
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+ {
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+ if(level[i/8]&(0x80>>(i%8)))
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+ tls_reg_write32(HR_GPIO_DATA + offset, reg | (1 << pin)); /* write high */
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+ else
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+ tls_reg_write32(HR_GPIO_DATA + offset, reg & (~(1 << pin)));/* write low */
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+ del = delay;
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+ while(del--);
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+ }
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+ tls_reg_write32(HR_GPIO_DATA_EN + offset, reg_en);
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+
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+ tls_os_release_critical(cpu_sr);
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+}
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+
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+
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+
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/**
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* @brief This function is used to config gpio interrupt
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*
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