luat_audio_es8311.c 15 KB

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  1. #include "luat_base.h"
  2. #include "luat_gpio.h"
  3. #include "luat_i2c.h"
  4. #include "luat_audio.h"
  5. #include "luat_timer.h"
  6. #define LUAT_LOG_TAG "es8311"
  7. #include "luat_log.h"
  8. #define ADC_VOLUME_GAIN 0xDF //0xEF
  9. #define DADC_GAIN 0x1A //0x17
  10. #define BCLK_DIV 0x13 //0x07
  11. #define ES8311_ADDR 0x18
  12. /* ES8311_REGISTER NAME_REG_REGISTER ADDRESS */
  13. #define ES8311_RESET_REG00 0x00 /*reset digital,csm,clock manager etc.*/
  14. /* Clock Scheme Register definition */
  15. #define ES8311_CLK_MANAGER_REG01 0x01 /* select clk src for mclk, enable clock for codec */
  16. #define ES8311_CLK_MANAGER_REG02 0x02 /* clk divider and clk multiplier */
  17. #define ES8311_CLK_MANAGER_REG03 0x03 /* adc fsmode and osr */
  18. #define ES8311_CLK_MANAGER_REG04 0x04 /* dac osr */
  19. #define ES8311_CLK_MANAGER_REG05 0x05 /* clk divier for adc and dac */
  20. #define ES8311_CLK_MANAGER_REG06 0x06 /* bclk inverter and divider */
  21. #define ES8311_CLK_MANAGER_REG07 0x07 /* tri-state, lrck divider */
  22. #define ES8311_CLK_MANAGER_REG08 0x08 /* lrck divider */
  23. #define ES8311_SDPIN_REG09 0x09 /* dac serial digital port */
  24. #define ES8311_SDPIN_REG09_DACWL_MASK (7 << 2)
  25. #define ES8311_SDPIN_REG09_DACWL_SHIFT 2
  26. #define ES8311_SDPOUT_REG0A 0x0A /* adc serial digital port */
  27. #define ES8311_SDPOUT_REG0A_ADCWL_MASK (7 << 2)
  28. #define ES8311_SDPOUT_REG0A_ADCWL_SHIFT 2
  29. #define ES8311_SYSTEM_REG0B 0x0B /* system */
  30. #define ES8311_SYSTEM_REG0C 0x0C /* system */
  31. #define ES8311_SYSTEM_REG0D 0x0D /* system, power up/down */
  32. #define ES8311_SYSTEM_REG0E 0x0E /* system, power up/down */
  33. #define ES8311_SYSTEM_REG0F 0x0F /* system, low power */
  34. #define ES8311_SYSTEM_REG10 0x10 /* system */
  35. #define ES8311_SYSTEM_REG11 0x11 /* system */
  36. #define ES8311_SYSTEM_REG12 0x12 /* system, Enable DAC */
  37. #define ES8311_SYSTEM_REG13 0x13 /* system */
  38. #define ES8311_SYSTEM_REG14 0x14 /* system, select DMIC, select analog pga gain */
  39. #define ES8311_ADC_REG15 0x15 /* ADC, adc ramp rate, dmic sense */
  40. #define ES8311_ADC_REG16 0x16 /* ADC */
  41. #define ES8311_ADC_REG17 0x17 /* ADC, volume */
  42. #define ES8311_ADC_REG18 0x18 /* ADC, alc enable and winsize */
  43. #define ES8311_ADC_REG19 0x19 /* ADC, alc maxlevel */
  44. #define ES8311_ADC_REG1A 0x1A /* ADC, alc automute */
  45. #define ES8311_ADC_REG1B 0x1B /* ADC, alc automute, adc hpf s1 */
  46. #define ES8311_ADC_REG1C 0x1C /* ADC, equalizer, hpf s2 */
  47. #define ES8311_DAC_REG31 0x31 /* DAC, mute */
  48. #define ES8311_DAC_REG32 0x32 /* DAC, volume */
  49. #define ES8311_DAC_REG33 0x33 /* DAC, offset */
  50. #define ES8311_DAC_REG34 0x34 /* DAC, drc enable, drc winsize */
  51. #define ES8311_DAC_REG35 0x35 /* DAC, drc maxlevel, minilevel */
  52. #define ES8311_DAC_REG37 0x37 /* DAC, ramprate */
  53. #define ES8311_GPIO_REG44 0x44 /* GPIO, dac2adc for test */
  54. #define ES8311_GP_REG45 0x45 /* GP CONTROL */
  55. #define ES8311_CHD1_REGFD 0xFD /* CHIP ID1 */
  56. #define ES8311_CHD2_REGFE 0xFE /* CHIP ID2 */
  57. #define ES8311_CHVER_REGFF 0xFF /* VERSION */
  58. #define ES8311_CHD1_REGFD 0xFD /* CHIP ID1 */
  59. #define ES8311_MAX_REGISTER 0xFF
  60. static void es8311_write_reg(luat_audio_codec_conf_t* conf,uint8_t addr, uint8_t data){
  61. uint8_t temp[] = {addr,data};
  62. luat_i2c_send(conf->i2c_id, ES8311_ADDR, temp, 2 , 1);
  63. luat_timer_mdelay(1);
  64. }
  65. static uint8_t es8311_read_reg(luat_audio_codec_conf_t* conf,uint8_t addr){
  66. uint8_t temp=0;
  67. luat_i2c_send(conf->i2c_id, ES8311_ADDR, &addr, 1 , 0);
  68. luat_i2c_recv(conf->i2c_id, ES8311_ADDR, &temp, 1);
  69. return temp;
  70. }
  71. static int es8311_codec_standby(luat_audio_codec_conf_t* conf){
  72. es8311_write_reg(conf,ES8311_DAC_REG32, 0x00);
  73. es8311_write_reg(conf,ES8311_ADC_REG17, 0x00);
  74. es8311_write_reg(conf,ES8311_SYSTEM_REG0E, 0xFF);
  75. es8311_write_reg(conf,ES8311_SYSTEM_REG12, 0x02);
  76. es8311_write_reg(conf,ES8311_SYSTEM_REG14, 0x00);
  77. es8311_write_reg(conf,ES8311_SYSTEM_REG0D, 0xFA);
  78. es8311_write_reg(conf,ES8311_RESET_REG00, 0x00);
  79. es8311_write_reg(conf,ES8311_RESET_REG00, 0x1F);
  80. es8311_write_reg(conf,ES8311_CLK_MANAGER_REG01, 0x30);
  81. es8311_write_reg(conf,ES8311_CLK_MANAGER_REG01, 0x00);
  82. es8311_write_reg(conf,ES8311_GP_REG45, 0x01);
  83. es8311_write_reg(conf,ES8311_SYSTEM_REG0D, 0xFC);
  84. return 0;
  85. }
  86. static uint8_t es8311_codec_mute(luat_audio_codec_conf_t* conf,uint8_t enable){
  87. if (enable) es8311_write_reg(conf,ES8311_DAC_REG31, 0x64);
  88. else es8311_write_reg(conf,ES8311_DAC_REG31, 0x00);
  89. return 0;
  90. }
  91. static uint8_t es8311_codec_vol(luat_audio_codec_conf_t* conf,uint8_t vol){
  92. if(vol < 0 || vol > 100) return -1;
  93. int gain = vol == 0 ? -955 : (vol - 80) * 5;
  94. uint8_t reg_val = (uint8_t)((gain + 955) / 5);
  95. es8311_write_reg(conf,ES8311_DAC_REG32, reg_val);
  96. return vol;
  97. }
  98. static void es8311_codec_mode(luat_audio_codec_conf_t* conf,uint8_t mode){
  99. if (mode == LUAT_CODEC_MODE_MASTER) es8311_write_reg(conf,ES8311_RESET_REG00, 0xC0);
  100. else if(mode == LUAT_CODEC_MODE_SLAVE) es8311_write_reg(conf,ES8311_RESET_REG00, 0x80);
  101. }
  102. static int es8311_codec_samplerate(luat_audio_codec_conf_t* conf,uint16_t samplerate){
  103. if(samplerate != 8000 && samplerate != 16000 && samplerate != 32000 &&
  104. samplerate != 11025 && samplerate != 22050 && samplerate != 44100 &&
  105. samplerate != 12000 && samplerate != 24000 && samplerate != 48000)
  106. {
  107. LLOGE("samplerate error!\n");
  108. return -1;
  109. }
  110. // uint8_t i = 0;
  111. static int mclk = 0;
  112. static int switchflag = 0;
  113. switch(samplerate){
  114. case 8000:
  115. if (mclk == 0){
  116. mclk = 1;
  117. }
  118. es8311_write_reg(conf,ES8311_CLK_MANAGER_REG02, 0x08);
  119. es8311_write_reg(conf,ES8311_CLK_MANAGER_REG05, 0x44);
  120. if (switchflag == 0){
  121. switchflag = 1;
  122. es8311_write_reg(conf,ES8311_CLK_MANAGER_REG03, 0x19);
  123. es8311_write_reg(conf,ES8311_CLK_MANAGER_REG04, 0x19);
  124. }
  125. break;
  126. case 16000:
  127. if (mclk == 0){
  128. mclk = 1;
  129. }
  130. es8311_write_reg(conf,ES8311_CLK_MANAGER_REG02, 0x90);
  131. es8311_write_reg(conf,ES8311_CLK_MANAGER_REG05, 0x00);
  132. if (switchflag == 0){
  133. switchflag = 1;
  134. es8311_write_reg(conf,ES8311_CLK_MANAGER_REG03, 0x19);
  135. es8311_write_reg(conf,ES8311_CLK_MANAGER_REG04, 0x19);
  136. }
  137. break;
  138. case 32000:
  139. if (mclk == 0){
  140. mclk = 1;
  141. }
  142. es8311_write_reg(conf,ES8311_CLK_MANAGER_REG02, 0x18);
  143. es8311_write_reg(conf,ES8311_CLK_MANAGER_REG05, 0x44);
  144. if (switchflag == 0){
  145. switchflag = 1;
  146. es8311_write_reg(conf,ES8311_CLK_MANAGER_REG03, 0x19);
  147. es8311_write_reg(conf,ES8311_CLK_MANAGER_REG04, 0x19);
  148. }
  149. break;
  150. case 44100:
  151. mclk = 0;
  152. switchflag = 0;
  153. es8311_write_reg(conf,ES8311_CLK_MANAGER_REG02, (0x03 << 3));
  154. es8311_write_reg(conf,ES8311_CLK_MANAGER_REG05, 0x00);
  155. es8311_write_reg(conf,ES8311_CLK_MANAGER_REG03, 0x10);
  156. es8311_write_reg(conf,ES8311_CLK_MANAGER_REG04, 0x10);
  157. break;
  158. case 22050:
  159. mclk = 0;
  160. switchflag = 0;
  161. es8311_write_reg(conf,ES8311_CLK_MANAGER_REG02, (0x02 << 3));
  162. es8311_write_reg(conf,ES8311_CLK_MANAGER_REG05, 0x00);
  163. es8311_write_reg(conf,ES8311_CLK_MANAGER_REG03, 0x10);
  164. es8311_write_reg(conf,ES8311_CLK_MANAGER_REG04, 0x10);
  165. break;
  166. case 11025:
  167. mclk = 0;
  168. switchflag = 0;
  169. es8311_write_reg(conf,ES8311_CLK_MANAGER_REG02, (0x01 << 3));
  170. es8311_write_reg(conf,ES8311_CLK_MANAGER_REG05, 0x00);
  171. es8311_write_reg(conf,ES8311_CLK_MANAGER_REG03, 0x10);
  172. es8311_write_reg(conf,ES8311_CLK_MANAGER_REG04, 0x10);
  173. break;
  174. case 48000:
  175. mclk = 0;
  176. switchflag = 0;
  177. es8311_write_reg(conf,ES8311_CLK_MANAGER_REG02, (0x03 << 3));
  178. es8311_write_reg(conf,ES8311_CLK_MANAGER_REG05, 0x00);
  179. es8311_write_reg(conf,ES8311_CLK_MANAGER_REG03, 0x10);
  180. es8311_write_reg(conf,ES8311_CLK_MANAGER_REG04, 0x10);
  181. break;
  182. case 24000:
  183. mclk = 0;
  184. switchflag = 0;
  185. es8311_write_reg(conf,ES8311_CLK_MANAGER_REG02, (0x02 << 3));
  186. es8311_write_reg(conf,ES8311_CLK_MANAGER_REG05, 0x00);
  187. es8311_write_reg(conf,ES8311_CLK_MANAGER_REG03, 0x10);
  188. es8311_write_reg(conf,ES8311_CLK_MANAGER_REG04, 0x10);
  189. break;
  190. case 12000:
  191. mclk = 0;
  192. switchflag = 0;
  193. es8311_write_reg(conf,ES8311_CLK_MANAGER_REG02, (0x01 << 3));
  194. es8311_write_reg(conf,ES8311_CLK_MANAGER_REG05, 0x00);
  195. es8311_write_reg(conf,ES8311_CLK_MANAGER_REG03, 0x10);
  196. es8311_write_reg(conf,ES8311_CLK_MANAGER_REG04, 0x10);
  197. break;
  198. default:
  199. break;
  200. }
  201. return 0;
  202. }
  203. static int es8311_update_bits(luat_audio_codec_conf_t* conf,uint8_t reg, uint8_t mask, uint8_t val){
  204. uint8_t old, new;
  205. old = es8311_read_reg(conf,reg);
  206. new = (old & ~mask) | (val & mask);
  207. es8311_write_reg(conf,reg, new);
  208. return 0;
  209. }
  210. static int es8311_codec_samplebits(luat_audio_codec_conf_t* conf,uint8_t samplebits){
  211. if(samplebits != 8 && samplebits != 16 && samplebits != 24 && samplebits != 32){
  212. LLOGE("bit_width error!\n");
  213. return -1;
  214. }
  215. int wl;
  216. switch (samplebits)
  217. {
  218. case 16:
  219. wl = 3;
  220. break;
  221. case 18:
  222. wl = 2;
  223. break;
  224. case 20:
  225. wl = 1;
  226. break;
  227. case 24:
  228. wl = 0;
  229. break;
  230. case 32:
  231. wl = 4;
  232. break;
  233. default:
  234. return -1;
  235. }
  236. es8311_update_bits(conf,ES8311_SDPIN_REG09,
  237. ES8311_SDPIN_REG09_DACWL_MASK,
  238. wl << ES8311_SDPIN_REG09_DACWL_SHIFT);
  239. es8311_update_bits(conf,ES8311_SDPOUT_REG0A,
  240. ES8311_SDPOUT_REG0A_ADCWL_MASK,
  241. wl << ES8311_SDPOUT_REG0A_ADCWL_SHIFT);
  242. return 0;
  243. }
  244. static int es8311_codec_channels(luat_audio_codec_conf_t* conf,uint8_t channels){
  245. return 0;
  246. }
  247. static int es8311_reg_init(luat_audio_codec_conf_t* conf){
  248. /* reset codec */
  249. es8311_write_reg(conf,ES8311_RESET_REG00, 0x1F);
  250. es8311_write_reg(conf,ES8311_GP_REG45, 0x00);
  251. luat_timer_mdelay(10);
  252. // es8311_write_reg(conf,ES8311_GPIO_REG44, 0x08);
  253. // luat_timer_mdelay(1);
  254. // es8311_write_reg(conf,ES8311_GPIO_REG44, 0x08);
  255. /* set ADC/DAC CLK */
  256. /* MCLK from BCLK */
  257. es8311_write_reg(conf,ES8311_CLK_MANAGER_REG01, 0x30);
  258. es8311_write_reg(conf,ES8311_CLK_MANAGER_REG02, 0x90);
  259. es8311_write_reg(conf,ES8311_CLK_MANAGER_REG03, 0x19);
  260. es8311_write_reg(conf,ES8311_ADC_REG16, 0x02);// bit5:0~non standard audio clock
  261. es8311_write_reg(conf,ES8311_CLK_MANAGER_REG04, 0x19);
  262. es8311_write_reg(conf,ES8311_CLK_MANAGER_REG05, 0x00);
  263. /*new cfg*/
  264. es8311_write_reg(conf,ES8311_CLK_MANAGER_REG06, BCLK_DIV);
  265. es8311_write_reg(conf,ES8311_CLK_MANAGER_REG07, 0x01);
  266. es8311_write_reg(conf,ES8311_CLK_MANAGER_REG08, 0xff);
  267. /* set system power up */
  268. es8311_write_reg(conf,ES8311_SYSTEM_REG0B, 0x00);
  269. es8311_write_reg(conf,ES8311_SYSTEM_REG0C, 0x00);
  270. es8311_write_reg(conf,ES8311_SYSTEM_REG10, 0x1F);
  271. es8311_write_reg(conf,ES8311_SYSTEM_REG11, 0x7F);
  272. /* chip powerup. slave mode */
  273. es8311_write_reg(conf,ES8311_RESET_REG00, 0x80);
  274. luat_timer_mdelay(50);
  275. /* power up analog */
  276. es8311_write_reg(conf,ES8311_SYSTEM_REG0D, 0x01);
  277. /* power up digital */
  278. es8311_write_reg(conf,ES8311_CLK_MANAGER_REG01, 0x3F);
  279. // SET ADC
  280. es8311_write_reg(conf,ES8311_SYSTEM_REG14, DADC_GAIN);
  281. // SET DAC
  282. es8311_write_reg(conf,ES8311_SYSTEM_REG12, 0x00);
  283. // ENABLE HP DRIVE
  284. es8311_write_reg(conf,ES8311_SYSTEM_REG13, 0x10);
  285. // SET ADC/DAC DATA FORMAT
  286. es8311_write_reg(conf,ES8311_SDPIN_REG09, 0x0c);
  287. es8311_write_reg(conf,ES8311_SDPOUT_REG0A, 0x0c);
  288. /* set normal power mode */
  289. es8311_write_reg(conf,ES8311_SYSTEM_REG0E, 0x02);
  290. es8311_write_reg(conf,ES8311_SYSTEM_REG0F, 0x44);
  291. // SET ADC
  292. /* set adc softramp */
  293. es8311_write_reg(conf,ES8311_ADC_REG15, 0x00);
  294. /* set adc hpf */
  295. es8311_write_reg(conf,ES8311_ADC_REG1B, 0x05);
  296. /* set adc hpf,ADC_EQ bypass */
  297. es8311_write_reg(conf,ES8311_ADC_REG1C, 0x65);
  298. /* set adc digtal vol */
  299. es8311_write_reg(conf,ES8311_ADC_REG17, ADC_VOLUME_GAIN);
  300. /* set dac softramp,disable DAC_EQ */
  301. es8311_write_reg(conf,ES8311_DAC_REG37, 0x08);
  302. es8311_write_reg(conf,ES8311_DAC_REG32, 0xBF);
  303. // /* set adc gain scale up */
  304. // es8311_write_reg(conf,ES8311_ADC_REG16, 0x24);
  305. // /* set adc alc maxgain */
  306. // es8311_write_reg(conf,ES8311_ADC_REG17, 0xBF);
  307. // /* adc alc disable,alc_winsize */
  308. // es8311_write_reg(conf,ES8311_ADC_REG18, 0x07);
  309. // /* set alc target level */
  310. // es8311_write_reg(conf,ES8311_ADC_REG19, 0xFB);
  311. // /* set adc_automute noise gate */
  312. // es8311_write_reg(conf,ES8311_ADC_REG1A, 0x03);
  313. // /* set adc_automute vol */
  314. // es8311_write_reg(conf,ES8311_ADC_REG1B, 0xEA);
  315. return 0;
  316. }
  317. static int es8311_codec_init(luat_audio_codec_conf_t* conf){
  318. uint8_t temp1 = 0, temp2 = 0, temp3 = 0;
  319. if (conf->pa_pin != -1){
  320. luat_gpio_mode(conf->pa_pin, Luat_GPIO_OUTPUT, Luat_GPIO_DEFAULT, !conf->pa_on_level);
  321. luat_gpio_set(conf->pa_pin, !conf->pa_on_level);
  322. }
  323. temp1 = es8311_read_reg(conf,ES8311_CHD1_REGFD);
  324. temp2 = es8311_read_reg(conf,ES8311_CHD2_REGFE);
  325. temp3 = es8311_read_reg(conf,ES8311_CHVER_REGFF);
  326. if(temp1 != 0x83 || temp2 != 0x11){
  327. LLOGE("codec err, id = 0x%x 0x%x ver = 0x%x", temp1, temp2, temp3);
  328. return -1;
  329. }
  330. es8311_reg_init(conf);
  331. return 0;
  332. }
  333. static int es8311_codec_deinit(luat_audio_codec_conf_t* conf){
  334. return 0;
  335. }
  336. static void es8311_codec_pa(luat_audio_codec_conf_t* conf,uint8_t on){
  337. if (on){
  338. luat_timer_mdelay(conf->dummy_time_len);
  339. luat_gpio_set(conf->pa_pin, conf->pa_on_level);
  340. luat_timer_mdelay(conf->pa_delay_time);
  341. }else{
  342. luat_gpio_set(conf->pa_pin, !conf->pa_on_level);
  343. }
  344. }
  345. static int es8311_codec_control(luat_audio_codec_conf_t* conf,luat_audio_codec_ctl_t cmd,uint32_t data){
  346. switch (cmd)
  347. {
  348. case LUAT_CODEC_CTL_MODE:
  349. es8311_codec_mode(conf,(uint8_t)data);
  350. break;
  351. case LUAT_CODEC_CTL_VOLUME:
  352. es8311_codec_vol(conf,(uint8_t)data);
  353. break;
  354. case LUAT_CODEC_CTL_MUTE:
  355. es8311_codec_mute(conf,(uint8_t)data);
  356. break;
  357. case LUAT_CODEC_CTL_RATE:
  358. es8311_codec_samplerate(conf,(uint16_t)data);
  359. break;
  360. case LUAT_CODEC_CTL_BITS:
  361. es8311_codec_samplebits(conf,(uint8_t)data);
  362. break;
  363. case LUAT_CODEC_CTL_CHANNEL:
  364. es8311_codec_channels(conf,(uint8_t)data);
  365. break;
  366. case LUAT_CODEC_CTL_PA:
  367. es8311_codec_pa(conf,(uint8_t)data);
  368. break;
  369. default:
  370. break;
  371. }
  372. return 0;
  373. }
  374. static int es8311_codec_start(luat_audio_codec_conf_t* conf){
  375. return 0;
  376. }
  377. static int es8311_codec_stop(luat_audio_codec_conf_t* conf){
  378. return 0;
  379. }
  380. luat_audio_codec_opts_t codec_opts_es8311 = {
  381. .name = "es8311",
  382. .init = es8311_codec_init,
  383. .deinit = es8311_codec_deinit,
  384. .control = es8311_codec_control,
  385. .start = es8311_codec_start,
  386. .stop = es8311_codec_stop,
  387. };