luat_audio_es8311.c 15 KB

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  1. #include "luat_base.h"
  2. #include "luat_gpio.h"
  3. #include "luat_i2c.h"
  4. #include "luat_audio_codec.h"
  5. #include "luat_timer.h"
  6. // #include "es8311.h"
  7. #define LUAT_LOG_TAG "es8311"
  8. #include "luat_log.h"
  9. #define I2C_REQ 400*1000
  10. #define ADC_VOLUME_GAIN 0xDF //0xEF
  11. #define DADC_GAIN 0x1A //0x17
  12. #define BCLK_DIV 0x13 //0x07
  13. #define ES8311_ADDR 0x18
  14. /* ES8311_REGISTER NAME_REG_REGISTER ADDRESS */
  15. #define ES8311_RESET_REG00 0x00 /*reset digital,csm,clock manager etc.*/
  16. /* Clock Scheme Register definition */
  17. #define ES8311_CLK_MANAGER_REG01 0x01 /* select clk src for mclk, enable clock for codec */
  18. #define ES8311_CLK_MANAGER_REG02 0x02 /* clk divider and clk multiplier */
  19. #define ES8311_CLK_MANAGER_REG03 0x03 /* adc fsmode and osr */
  20. #define ES8311_CLK_MANAGER_REG04 0x04 /* dac osr */
  21. #define ES8311_CLK_MANAGER_REG05 0x05 /* clk divier for adc and dac */
  22. #define ES8311_CLK_MANAGER_REG06 0x06 /* bclk inverter and divider */
  23. #define ES8311_CLK_MANAGER_REG07 0x07 /* tri-state, lrck divider */
  24. #define ES8311_CLK_MANAGER_REG08 0x08 /* lrck divider */
  25. #define ES8311_SDPIN_REG09 0x09 /* dac serial digital port */
  26. #define ES8311_SDPIN_REG09_DACWL_MASK (7 << 2)
  27. #define ES8311_SDPIN_REG09_DACWL_SHIFT 2
  28. #define ES8311_SDPOUT_REG0A 0x0A /* adc serial digital port */
  29. #define ES8311_SDPOUT_REG0A_ADCWL_MASK (7 << 2)
  30. #define ES8311_SDPOUT_REG0A_ADCWL_SHIFT 2
  31. #define ES8311_SYSTEM_REG0B 0x0B /* system */
  32. #define ES8311_SYSTEM_REG0C 0x0C /* system */
  33. #define ES8311_SYSTEM_REG0D 0x0D /* system, power up/down */
  34. #define ES8311_SYSTEM_REG0E 0x0E /* system, power up/down */
  35. #define ES8311_SYSTEM_REG0F 0x0F /* system, low power */
  36. #define ES8311_SYSTEM_REG10 0x10 /* system */
  37. #define ES8311_SYSTEM_REG11 0x11 /* system */
  38. #define ES8311_SYSTEM_REG12 0x12 /* system, Enable DAC */
  39. #define ES8311_SYSTEM_REG13 0x13 /* system */
  40. #define ES8311_SYSTEM_REG14 0x14 /* system, select DMIC, select analog pga gain */
  41. #define ES8311_ADC_REG15 0x15 /* ADC, adc ramp rate, dmic sense */
  42. #define ES8311_ADC_REG16 0x16 /* ADC */
  43. #define ES8311_ADC_REG17 0x17 /* ADC, volume */
  44. #define ES8311_ADC_REG18 0x18 /* ADC, alc enable and winsize */
  45. #define ES8311_ADC_REG19 0x19 /* ADC, alc maxlevel */
  46. #define ES8311_ADC_REG1A 0x1A /* ADC, alc automute */
  47. #define ES8311_ADC_REG1B 0x1B /* ADC, alc automute, adc hpf s1 */
  48. #define ES8311_ADC_REG1C 0x1C /* ADC, equalizer, hpf s2 */
  49. #define ES8311_DAC_REG31 0x31 /* DAC, mute */
  50. #define ES8311_DAC_REG32 0x32 /* DAC, volume */
  51. #define ES8311_DAC_REG33 0x33 /* DAC, offset */
  52. #define ES8311_DAC_REG34 0x34 /* DAC, drc enable, drc winsize */
  53. #define ES8311_DAC_REG35 0x35 /* DAC, drc maxlevel, minilevel */
  54. #define ES8311_DAC_REG37 0x37 /* DAC, ramprate */
  55. #define ES8311_GPIO_REG44 0x44 /* GPIO, dac2adc for test */
  56. #define ES8311_GP_REG45 0x45 /* GP CONTROL */
  57. #define ES8311_CHD1_REGFD 0xFD /* CHIP ID1 */
  58. #define ES8311_CHD2_REGFE 0xFE /* CHIP ID2 */
  59. #define ES8311_CHVER_REGFF 0xFF /* VERSION */
  60. #define ES8311_CHD1_REGFD 0xFD /* CHIP ID1 */
  61. #define ES8311_MAX_REGISTER 0xFF
  62. static void es8311_write_reg(uint8_t addr, uint8_t data){
  63. uint8_t temp[] = {addr,data};
  64. luat_i2c_send(0, ES8311_ADDR, temp, 2 , 1);
  65. luat_timer_mdelay(1);
  66. }
  67. static uint8_t es8311_read_reg(uint8_t addr){
  68. uint8_t temp=0;
  69. luat_i2c_send(0, ES8311_ADDR, &addr, 1 , 0);
  70. luat_i2c_recv(0, ES8311_ADDR, &temp, 1);
  71. return temp;
  72. }
  73. static int es8311_codec_standby(void){
  74. es8311_write_reg(ES8311_DAC_REG32, 0x00);
  75. es8311_write_reg(ES8311_ADC_REG17, 0x00);
  76. es8311_write_reg(ES8311_SYSTEM_REG0E, 0xFF);
  77. es8311_write_reg(ES8311_SYSTEM_REG12, 0x02);
  78. es8311_write_reg(ES8311_SYSTEM_REG14, 0x00);
  79. es8311_write_reg(ES8311_SYSTEM_REG0D, 0xFA);
  80. es8311_write_reg(ES8311_RESET_REG00, 0x00);
  81. es8311_write_reg(ES8311_RESET_REG00, 0x1F);
  82. es8311_write_reg(ES8311_CLK_MANAGER_REG01, 0x30);
  83. es8311_write_reg(ES8311_CLK_MANAGER_REG01, 0x00);
  84. es8311_write_reg(ES8311_GP_REG45, 0x01);
  85. es8311_write_reg(ES8311_SYSTEM_REG0D, 0xFC);
  86. return 0;
  87. }
  88. static uint8_t es8311_codec_mute(uint8_t enable){
  89. if (enable) es8311_write_reg(ES8311_DAC_REG31, 0x64);
  90. else es8311_write_reg(ES8311_DAC_REG31, 0x00);
  91. return 0;
  92. }
  93. static uint8_t es8311_codec_vol(uint8_t vol){
  94. if(vol < 0 || vol > 100){
  95. return -1;
  96. }
  97. int gain = vol == 0 ? -955 : (vol - 80) * 5;
  98. uint8_t reg_val = (uint8_t)((gain + 955) / 5);
  99. es8311_write_reg(ES8311_DAC_REG32, reg_val);
  100. return vol;
  101. }
  102. /*0---master, 1---slave*/
  103. static void es8311_codec_mode(uint8_t mode){
  104. if (mode == 0){
  105. es8311_write_reg(ES8311_RESET_REG00, 0xC0);
  106. }else{
  107. es8311_write_reg(ES8311_RESET_REG00, 0x80);
  108. }
  109. }
  110. static int es8311_codec_samplerate(uint16_t samplerate){
  111. if(samplerate != 8000 && samplerate != 16000 && samplerate != 32000 &&
  112. samplerate != 11025 && samplerate != 22050 && samplerate != 44100 &&
  113. samplerate != 12000 && samplerate != 24000 && samplerate != 48000)
  114. {
  115. LLOGE("samplerate error!\n");
  116. return -1;
  117. }
  118. // uint8_t i = 0;
  119. static int mclk = 0;
  120. static int switchflag = 0;
  121. switch(samplerate){
  122. case 8000:
  123. if (mclk == 0){
  124. mclk = 1;
  125. }
  126. es8311_write_reg(ES8311_CLK_MANAGER_REG02, 0x08);
  127. es8311_write_reg(ES8311_CLK_MANAGER_REG05, 0x44);
  128. if (switchflag == 0){
  129. switchflag = 1;
  130. es8311_write_reg(ES8311_CLK_MANAGER_REG03, 0x19);
  131. es8311_write_reg(ES8311_CLK_MANAGER_REG04, 0x19);
  132. }
  133. break;
  134. case 16000:
  135. if (mclk == 0){
  136. mclk = 1;
  137. }
  138. es8311_write_reg(ES8311_CLK_MANAGER_REG02, 0x90);
  139. es8311_write_reg(ES8311_CLK_MANAGER_REG05, 0x00);
  140. if (switchflag == 0){
  141. switchflag = 1;
  142. es8311_write_reg(ES8311_CLK_MANAGER_REG03, 0x19);
  143. es8311_write_reg(ES8311_CLK_MANAGER_REG04, 0x19);
  144. }
  145. break;
  146. case 32000:
  147. if (mclk == 0){
  148. mclk = 1;
  149. }
  150. es8311_write_reg(ES8311_CLK_MANAGER_REG02, 0x18);
  151. es8311_write_reg(ES8311_CLK_MANAGER_REG05, 0x44);
  152. if (switchflag == 0){
  153. switchflag = 1;
  154. es8311_write_reg(ES8311_CLK_MANAGER_REG03, 0x19);
  155. es8311_write_reg(ES8311_CLK_MANAGER_REG04, 0x19);
  156. }
  157. break;
  158. case 44100:
  159. mclk = 0;
  160. switchflag = 0;
  161. es8311_write_reg(ES8311_CLK_MANAGER_REG02, (0x03 << 3));
  162. es8311_write_reg(ES8311_CLK_MANAGER_REG05, 0x00);
  163. es8311_write_reg(ES8311_CLK_MANAGER_REG03, 0x10);
  164. es8311_write_reg(ES8311_CLK_MANAGER_REG04, 0x10);
  165. break;
  166. case 22050:
  167. mclk = 0;
  168. switchflag = 0;
  169. es8311_write_reg(ES8311_CLK_MANAGER_REG02, (0x02 << 3));
  170. es8311_write_reg(ES8311_CLK_MANAGER_REG05, 0x00);
  171. es8311_write_reg(ES8311_CLK_MANAGER_REG03, 0x10);
  172. es8311_write_reg(ES8311_CLK_MANAGER_REG04, 0x10);
  173. break;
  174. case 11025:
  175. mclk = 0;
  176. switchflag = 0;
  177. es8311_write_reg(ES8311_CLK_MANAGER_REG02, (0x01 << 3));
  178. es8311_write_reg(ES8311_CLK_MANAGER_REG05, 0x00);
  179. es8311_write_reg(ES8311_CLK_MANAGER_REG03, 0x10);
  180. es8311_write_reg(ES8311_CLK_MANAGER_REG04, 0x10);
  181. break;
  182. case 48000:
  183. mclk = 0;
  184. switchflag = 0;
  185. es8311_write_reg(ES8311_CLK_MANAGER_REG02, (0x03 << 3));
  186. es8311_write_reg(ES8311_CLK_MANAGER_REG05, 0x00);
  187. es8311_write_reg(ES8311_CLK_MANAGER_REG03, 0x10);
  188. es8311_write_reg(ES8311_CLK_MANAGER_REG04, 0x10);
  189. break;
  190. case 24000:
  191. mclk = 0;
  192. switchflag = 0;
  193. es8311_write_reg(ES8311_CLK_MANAGER_REG02, (0x02 << 3));
  194. es8311_write_reg(ES8311_CLK_MANAGER_REG05, 0x00);
  195. es8311_write_reg(ES8311_CLK_MANAGER_REG03, 0x10);
  196. es8311_write_reg(ES8311_CLK_MANAGER_REG04, 0x10);
  197. break;
  198. case 12000:
  199. mclk = 0;
  200. switchflag = 0;
  201. es8311_write_reg(ES8311_CLK_MANAGER_REG02, (0x01 << 3));
  202. es8311_write_reg(ES8311_CLK_MANAGER_REG05, 0x00);
  203. es8311_write_reg(ES8311_CLK_MANAGER_REG03, 0x10);
  204. es8311_write_reg(ES8311_CLK_MANAGER_REG04, 0x10);
  205. break;
  206. default:
  207. break;
  208. }
  209. return 0;
  210. }
  211. static int es8311_update_bits(uint8_t reg, uint8_t mask, uint8_t val){
  212. uint8_t old, new;
  213. old = es8311_read_reg(reg);
  214. new = (old & ~mask) | (val & mask);
  215. es8311_write_reg(reg, new);
  216. return 0;
  217. }
  218. static int es8311_codec_samplebits(uint8_t samplebits){
  219. if(samplebits != 8 && samplebits != 16 && samplebits != 24 && samplebits != 32){
  220. LLOGE("bit_width error!\n");
  221. return -1;
  222. }
  223. int wl;
  224. switch (samplebits)
  225. {
  226. case 16:
  227. wl = 3;
  228. break;
  229. case 18:
  230. wl = 2;
  231. break;
  232. case 20:
  233. wl = 1;
  234. break;
  235. case 24:
  236. wl = 0;
  237. break;
  238. case 32:
  239. wl = 4;
  240. break;
  241. default:
  242. return -1;
  243. }
  244. es8311_update_bits(ES8311_SDPIN_REG09,
  245. ES8311_SDPIN_REG09_DACWL_MASK,
  246. wl << ES8311_SDPIN_REG09_DACWL_SHIFT);
  247. es8311_update_bits(ES8311_SDPOUT_REG0A,
  248. ES8311_SDPOUT_REG0A_ADCWL_MASK,
  249. wl << ES8311_SDPOUT_REG0A_ADCWL_SHIFT);
  250. return 0;
  251. }
  252. static int es8311_codec_channels(uint8_t channels){
  253. return 0;
  254. }
  255. static int es8311_reg_init(void){
  256. /* reset codec */
  257. es8311_write_reg(ES8311_RESET_REG00, 0x1F);
  258. es8311_write_reg(ES8311_GP_REG45, 0x00);
  259. luat_timer_mdelay(10);
  260. // es8311_write_reg(ES8311_GPIO_REG44, 0x08);
  261. // luat_timer_mdelay(1);
  262. // es8311_write_reg(ES8311_GPIO_REG44, 0x08);
  263. /* set ADC/DAC CLK */
  264. /* MCLK from BCLK */
  265. es8311_write_reg(ES8311_CLK_MANAGER_REG01, 0x30);
  266. es8311_write_reg(ES8311_CLK_MANAGER_REG02, 0x90);
  267. es8311_write_reg(ES8311_CLK_MANAGER_REG03, 0x19);
  268. es8311_write_reg(ES8311_ADC_REG16, 0x02);// bit5:0~non standard audio clock
  269. es8311_write_reg(ES8311_CLK_MANAGER_REG04, 0x19);
  270. es8311_write_reg(ES8311_CLK_MANAGER_REG05, 0x00);
  271. /*new cfg*/
  272. es8311_write_reg(ES8311_CLK_MANAGER_REG06, BCLK_DIV);
  273. es8311_write_reg(ES8311_CLK_MANAGER_REG07, 0x01);
  274. es8311_write_reg(ES8311_CLK_MANAGER_REG08, 0xff);
  275. /* set system power up */
  276. es8311_write_reg(ES8311_SYSTEM_REG0B, 0x00);
  277. es8311_write_reg(ES8311_SYSTEM_REG0C, 0x00);
  278. es8311_write_reg(ES8311_SYSTEM_REG10, 0x1F);
  279. es8311_write_reg(ES8311_SYSTEM_REG11, 0x7F);
  280. /* chip powerup. slave mode */
  281. es8311_write_reg(ES8311_RESET_REG00, 0x80);
  282. luat_timer_mdelay(50);
  283. /* power up analog */
  284. es8311_write_reg(ES8311_SYSTEM_REG0D, 0x01);
  285. /* power up digital */
  286. es8311_write_reg(ES8311_CLK_MANAGER_REG01, 0x3F);
  287. // SET ADC
  288. es8311_write_reg(ES8311_SYSTEM_REG14, DADC_GAIN);
  289. // SET DAC
  290. es8311_write_reg(ES8311_SYSTEM_REG12, 0x00);
  291. // ENABLE HP DRIVE
  292. es8311_write_reg(ES8311_SYSTEM_REG13, 0x10);
  293. // SET ADC/DAC DATA FORMAT
  294. es8311_write_reg(ES8311_SDPIN_REG09, 0x0c);
  295. es8311_write_reg(ES8311_SDPOUT_REG0A, 0x0c);
  296. /* set normal power mode */
  297. es8311_write_reg(ES8311_SYSTEM_REG0E, 0x02);
  298. es8311_write_reg(ES8311_SYSTEM_REG0F, 0x44);
  299. // SET ADC
  300. /* set adc softramp */
  301. es8311_write_reg(ES8311_ADC_REG15, 0x00);
  302. /* set adc hpf */
  303. es8311_write_reg(ES8311_ADC_REG1B, 0x05);
  304. /* set adc hpf,ADC_EQ bypass */
  305. es8311_write_reg(ES8311_ADC_REG1C, 0x65);
  306. /* set adc digtal vol */
  307. es8311_write_reg(ES8311_ADC_REG17, ADC_VOLUME_GAIN);
  308. /* set dac softramp,disable DAC_EQ */
  309. es8311_write_reg(ES8311_DAC_REG37, 0x08);
  310. es8311_write_reg(ES8311_DAC_REG32, 0xBF);
  311. // /* set adc gain scale up */
  312. // es8311_write_reg(ES8311_ADC_REG16, 0x24);
  313. // /* set adc alc maxgain */
  314. // es8311_write_reg(ES8311_ADC_REG17, 0xBF);
  315. // /* adc alc disable,alc_winsize */
  316. // es8311_write_reg(ES8311_ADC_REG18, 0x07);
  317. // /* set alc target level */
  318. // es8311_write_reg(ES8311_ADC_REG19, 0xFB);
  319. // /* set adc_automute noise gate */
  320. // es8311_write_reg(ES8311_ADC_REG1A, 0x03);
  321. // /* set adc_automute vol */
  322. // es8311_write_reg(ES8311_ADC_REG1B, 0xEA);
  323. return 0;
  324. }
  325. static int es8311_codec_init(luat_audio_codec_conf_t* conf){
  326. uint8_t temp1 = 0, temp2 = 0, temp3 = 0;
  327. if (conf->pa_pin != -1){
  328. luat_gpio_mode(conf->pa_pin, Luat_GPIO_OUTPUT, Luat_GPIO_DEFAULT, !conf->pa_on_level);
  329. luat_gpio_set(conf->pa_pin, !conf->pa_on_level);
  330. }
  331. luat_i2c_setup(0, I2C_REQ);
  332. temp1 = es8311_read_reg(ES8311_CHD1_REGFD);
  333. temp2 = es8311_read_reg(ES8311_CHD2_REGFE);
  334. temp3 = es8311_read_reg(ES8311_CHVER_REGFF);
  335. if(temp1 != 0x83 || temp2 != 0x11){
  336. LLOGE("codec err, id = 0x%x 0x%x ver = 0x%x", temp1, temp2, temp3);
  337. return -1;
  338. }
  339. es8311_reg_init();
  340. return 0;
  341. }
  342. static int es8311_codec_deinit(luat_audio_codec_conf_t* conf){
  343. return 0;
  344. }
  345. static void es8311_codec_pa(luat_audio_codec_conf_t* conf,uint8_t on){
  346. if (on){
  347. luat_timer_mdelay(conf->dummy_time_len);
  348. luat_gpio_set(conf->pa_pin, conf->pa_on_level);
  349. luat_timer_mdelay(conf->pa_delay_time);
  350. }else{
  351. luat_gpio_set(conf->pa_pin, !conf->pa_on_level);
  352. }
  353. }
  354. static int es8311_codec_control(luat_audio_codec_conf_t* conf,luat_audio_codec_ctl_t cmd,uint32_t data){
  355. switch (cmd)
  356. {
  357. case LUAT_CODEC_CTL_MODE:
  358. es8311_codec_mode((uint8_t)data);
  359. break;
  360. case LUAT_CODEC_CTL_VOLUME:
  361. es8311_codec_vol((uint8_t)data);
  362. case LUAT_CODEC_CTL_MUTE:
  363. es8311_codec_mute((uint8_t)data);
  364. break;
  365. case LUAT_CODEC_CTL_RATE:
  366. es8311_codec_samplerate((uint16_t)data);
  367. break;
  368. case LUAT_CODEC_CTL_BITS:
  369. es8311_codec_samplebits((uint8_t)data);
  370. break;
  371. case LUAT_CODEC_CTL_CHANNEL:
  372. es8311_codec_channels((uint8_t)data);
  373. break;
  374. case LUAT_CODEC_CTL_PA:
  375. es8311_codec_pa(conf,(uint8_t)data);
  376. break;
  377. default:
  378. break;
  379. }
  380. return 0;
  381. }
  382. static int es8311_codec_start(luat_audio_codec_conf_t* conf){
  383. return 0;
  384. }
  385. static int es8311_codec_stop(luat_audio_codec_conf_t* conf){
  386. return 0;
  387. }
  388. const luat_audio_codec_opts_t codec_opts_es8311 = {
  389. .name = "es8311",
  390. .init = es8311_codec_init,
  391. .deinit = es8311_codec_deinit,
  392. .control = es8311_codec_control,
  393. .start = es8311_codec_start,
  394. .stop = es8311_codec_stop,
  395. };